Merge "ARM: dts: msm: Update clock gfx node for MSMfalcon/Triton"

7 files changed, 47 insertions, 15 deletions

diff --git a/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts b/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts
index 1575cea079ce..00efa39f017d 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts
@@ -102,3 +102,8 @@
 &pmfalcon_fg {
 	status = "disabled";
 };
+
+&clock_gfx {
+	compatible = "qcom,dummycc";
+	clock-output-names = "gfx_clocks";
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
index e2f5e32cc544..944f662ccc52 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi
+++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
@@ -467,8 +467,21 @@
 	};
 
 	clock_gfx: clock-controller@5065000 {
-		compatible = "qcom,dummycc";
-		clock-output-names = "gfx_clocks";
+		compatible = "qcom,gpucc-msmfalcon";
+		reg = <0x5065000 0x10000>;
+		vdd_dig_gfx-supply = <&pm2falcon_s3_level>;
+		vdd_mx_gfx-supply = <&pm2falcon_s5_level>;
+		vdd_gfx-supply = <&gfx_vreg_corner>;
+		qcom,gfxfreq-corner =
+			< 0         0>,
+			< 160000000 1>,  /* MinSVS */
+			< 266000000 2>,  /* LowSVS */
+			< 370000000 3>,  /* SVS    */
+			< 465000000 4>,  /* SVS_L1 */
+			< 588000000 5>,  /* NOM    */
+			< 647000000 6>,  /* NOM_L1 */
+			< 700000000 7>,  /* TURBO */
+			< 750000000 7>;  /* TURBO  */
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
@@ -985,10 +998,8 @@
 };
 
 &gdsc_gpu_gx {
-	clock-names = "bimc_core_clk", "core_clk", "core_root_clk";
-	clocks = <&clock_gcc GCC_GPU_BIMC_GFX_CLK>,
-		 <&clock_gfx GPUCC_GFX3D_CLK>,
-		 <&clock_gfx GFX3D_CLK_SRC>;
+	clock-names = "core_root_clk";
+	clocks = <&clock_gfx GFX3D_CLK_SRC>;
 	qcom,force-enable-root-clk;
 	parent-supply = <&gfx_vreg_corner>;
 	status = "ok";
diff --git a/arch/arm/boot/dts/qcom/msmtriton-rumi.dts b/arch/arm/boot/dts/qcom/msmtriton-rumi.dts
index 08809fb38cae..491b55aab9a6 100644
--- a/arch/arm/boot/dts/qcom/msmtriton-rumi.dts
+++ b/arch/arm/boot/dts/qcom/msmtriton-rumi.dts
@@ -63,3 +63,8 @@
 	compatible = "qcom,dummycc";
 	clock-output-names = "gcc_clocks";
 };
+
+&clock_gfx {
+	compatible = "qcom,dummycc";
+	clock-output-names = "gfx_clocks";
+};
diff --git a/arch/arm/boot/dts/qcom/msmtriton.dtsi b/arch/arm/boot/dts/qcom/msmtriton.dtsi
index cd751f3181ee..00dad563a020 100644
--- a/arch/arm/boot/dts/qcom/msmtriton.dtsi
+++ b/arch/arm/boot/dts/qcom/msmtriton.dtsi
@@ -382,8 +382,21 @@
 	};
 
 	clock_gfx: clock-controller@5065000 {
-		compatible = "qcom,dummycc";
-		clock-output-names = "gfx_clocks";
+		compatible = "qcom,gpucc-msmfalcon";
+		reg = <0x5065000 0x10000>;
+		vdd_dig_gfx-supply = <&pm2falcon_s3_level>;
+		vdd_mx_gfx-supply = <&pm2falcon_s5_level>;
+		vdd_gfx-supply = <&gfx_vreg_corner>;
+		qcom,gfxfreq-corner =
+			< 0         0>,
+			< 160000000 1>,  /* MinSVS */
+			< 266000000 2>,  /* LowSVS */
+			< 370000000 3>,  /* SVS    */
+			< 465000000 4>,  /* SVS_L1 */
+			< 588000000 5>,  /* NOM    */
+			< 647000000 6>,  /* NOM_L1 */
+			< 700000000 7>,  /* TURBO  */
+			< 750000000 7>;  /* TURBO  */
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
@@ -794,10 +807,8 @@
 };
 
 &gdsc_gpu_gx {
-	clock-names = "bimc_core_clk", "core_clk", "core_root_clk";
-	clocks = <&clock_gcc GCC_GPU_BIMC_GFX_CLK>,
-		 <&clock_gfx GPUCC_GFX3D_CLK>,
-		 <&clock_gfx GFX3D_CLK_SRC>;
+	clock-names = "core_root_clk";
+	clocks = <&clock_gfx GFX3D_CLK_SRC>;
 	qcom,force-enable-root-clk;
 	parent-supply = <&gfx_vreg_corner>;
 	status = "ok";
diff --git a/arch/arm/configs/msmfalcon_defconfig b/arch/arm/configs/msmfalcon_defconfig
index 8039441cc972..abd89c1ca060 100644
--- a/arch/arm/configs/msmfalcon_defconfig
+++ b/arch/arm/configs/msmfalcon_defconfig
@@ -422,7 +422,7 @@ CONFIG_RMNET_IPA3=y
 CONFIG_GPIO_USB_DETECT=y
 CONFIG_USB_BAM=y
 CONFIG_QCOM_CLK_SMD_RPM=y
-CONFIG_MSM_GCC_FALCON=y
+CONFIG_MSM_GPUCC_FALCON=y
 CONFIG_REMOTE_SPINLOCK_MSM=y
 CONFIG_ARM_SMMU=y
 CONFIG_IOMMU_DEBUG=y
diff --git a/arch/arm64/configs/msmfalcon-perf_defconfig b/arch/arm64/configs/msmfalcon-perf_defconfig
index 54925c6bcf4e..1074672d252f 100644
--- a/arch/arm64/configs/msmfalcon-perf_defconfig
+++ b/arch/arm64/configs/msmfalcon-perf_defconfig
@@ -489,7 +489,7 @@ CONFIG_GPIO_USB_DETECT=y
 CONFIG_SEEMP_CORE=y
 CONFIG_USB_BAM=y
 CONFIG_QCOM_CLK_SMD_RPM=y
-CONFIG_MSM_GCC_FALCON=y
+CONFIG_MSM_GPUCC_FALCON=y
 CONFIG_REMOTE_SPINLOCK_MSM=y
 CONFIG_IOMMU_IO_PGTABLE_FAST=y
 CONFIG_ARM_SMMU=y
diff --git a/arch/arm64/configs/msmfalcon_defconfig b/arch/arm64/configs/msmfalcon_defconfig
index 820385a0217a..6d8d9eeab2d5 100644
--- a/arch/arm64/configs/msmfalcon_defconfig
+++ b/arch/arm64/configs/msmfalcon_defconfig
@@ -498,7 +498,7 @@ CONFIG_GPIO_USB_DETECT=y
 CONFIG_SEEMP_CORE=y
 CONFIG_USB_BAM=y
 CONFIG_QCOM_CLK_SMD_RPM=y
-CONFIG_MSM_GCC_FALCON=y
+CONFIG_MSM_GPUCC_FALCON=y
 CONFIG_REMOTE_SPINLOCK_MSM=y
 CONFIG_IOMMU_IO_PGTABLE_FAST=y
 CONFIG_IOMMU_IO_PGTABLE_FAST_SELFTEST=y