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| author | Linux Build Service Account <lnxbuild@localhost> | 2017-02-03 06:27:02 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-02-03 06:27:02 -0800 |
| commit | 147b2394be6d487f75445ed84794b60c4dc8cfc8 (patch) | |
| tree | 106c595e4f211d1b2f180a87d3e325bf3c4ef996 | |
| parent | 7888c1e5c1d4fe6670d3034f0485465037032283 (diff) | |
| parent | 312981bf914f7b62cca36f5be2cc8b8b371d623b (diff) | |
Merge "ARM: dts: msm: Add sdhc ice device node for sdm660"
| -rw-r--r-- | arch/arm/boot/dts/qcom/sdm660.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/sdm660.dtsi b/arch/arm/boot/dts/qcom/sdm660.dtsi index 1d78228ab062..7a495022cfa6 100644 --- a/arch/arm/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660.dtsi @@ -1274,6 +1274,28 @@ qcom,instance-type = "ufs"; }; + sdcc1_ice: sdcc1ice@c0c8000 { + compatible = "qcom,ice"; + reg = <0xc0c8000 0x8000>; + qcom,enable-ice-clk; + clock-names = "ice_core_clk_src", "ice_core_clk", + "bus_clk", "iface_clk"; + clocks = <&clock_gcc SDCC1_ICE_CORE_CLK_SRC>, + <&clock_gcc GCC_SDCC1_ICE_CORE_CLK>, + <&clock_gcc GCC_SDCC1_APPS_CLK>, + <&clock_gcc GCC_SDCC1_AHB_CLK>; + qcom,op-freq-hz = <300000000>, <0>, <0>, <0>; + qcom,msm-bus,name = "sdcc_ice_noc"; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <78 512 0 0>, /* No vote */ + <78 512 1000 0>; /* Max. bandwidth */ + qcom,bus-vector-names = "MIN", + "MAX"; + qcom,instance-type = "sdcc"; + }; + sdhc_1: sdhci@c0c4000 { compatible = "qcom,sdhci-msm-v5"; reg = <0xc0c4000 0x1000>, <0xc0c5000 0x1000>; @@ -1284,6 +1306,7 @@ qcom,bus-width = <8>; qcom,large-address-bus; + sdhc-msm-crypto = <&sdcc1_ice>; qcom,devfreq,freq-table = <50000000 200000000>; |