diff options
| author | Fengguang Wu <fengguang.wu@intel.com> | 2014-08-04 13:29:11 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2014-08-13 07:51:09 +0200 |
| commit | 17a6034555c601331311d31beb395f6665056b3e (patch) | |
| tree | bb114ca1c5181adc15faf2dd8079e3a36e88877f | |
| parent | c1e46580c3b7bf25053519cf39f01a2f9ea4d865 (diff) | |
perf/x86/uncore: Fix coccinelle warnings
arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c:961:2-3: Unneeded semicolon
arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c:1100:2-3: Unneeded semicolon
arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c:1138:2-3: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Yan, Zheng <zheng.z.yan@intel.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Link: http://lkml.kernel.org/n/tip-ovfvr4nbqjo7nzc16y2lpjy9@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c index 93b11a8f110d..2749965afed0 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c @@ -958,7 +958,7 @@ static void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event /* shift the 0~7 bits to the 8~15 bits */ reg1->config <<= 8; break; - }; + } } /* @@ -1097,7 +1097,7 @@ static int nhmex_rbox_hw_config(struct intel_uncore_box *box, struct perf_event hwc->config |= event->attr.config & (~0ULL << 32); reg2->config = event->attr.config2; break; - }; + } return 0; } @@ -1135,7 +1135,7 @@ static void nhmex_rbox_msr_enable_event(struct intel_uncore_box *box, struct per wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MATCH(port), reg1->config); wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MASK(port), reg2->config); break; - }; + } wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 | (hwc->config & NHMEX_R_PMON_CTL_EV_SEL_MASK)); |