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authorPaul Burton <paul.burton@imgtec.com>2017-06-02 15:38:03 -0700
committerGreg Kroah-Hartman <gregkh@google.com>2018-02-05 08:58:35 -0800
commit315428718fd29e4ffac9611ba17bc4a2679a2de3 (patch)
treee8662816366571a5535d416a361a978c379aee2b
parentb1f4d404b412b61646da1df0e97a750bdd4032b9 (diff)
UPSTREAM: MIPS: Allow storing pgd in C0_CONTEXT for MIPSr6
CONFIG_MIPS_PGD_C0_CONTEXT, which allows a pointer to the page directory to be stored in the cop0 Context register when enabled, was previously only allowed for MIPSr2. MIPSr6 is just as able to make use of it, so allow it there too. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16204/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit cebf8c0f4f4e378f5e82606023b92ffbb1ad6048) Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
-rw-r--r--arch/mips/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a0383f86e230..2c93e3b7d318 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2039,7 +2039,7 @@ config CPU_SUPPORTS_UNCACHED_ACCELERATED
bool
config MIPS_PGD_C0_CONTEXT
bool
- default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
+ default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
#
# Set to y for ptrace access to watch registers.