Merge "ARM: dts: msm: Add 2.3 GHz performance cluster support on MSMCOBALT v2"

4 files changed, 219 insertions, 294 deletions

diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt b/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt
index 518cc6f85f95..c4d651e36d02 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt
@@ -56,15 +56,17 @@ Properties:
 	Usage:      required
 	Value type: <prop-encoded-array>
 	Definition: Array which defines the frequency in Hertz, frequency,
-		    PLL override data, and ACC level used by the OSM hardware
-		    for each supported DCVS setpoint of the Power cluster.
+		    PLL override data, ACC level, and virtual corner used
+		    by the OSM hardware for each supported DCVS setpoint
+		    of the Power cluster.
 
 - qcom,perfcl-speedbinX-v0
 	Usage:      required
 	Value type: <prop-encoded-array>
 	Definition: Array which defines the frequency in Hertz, frequency,
-		    PLL override data, and ACC level used by the OSM hardware
-		    for each supported DCVS setpoint of the Performance cluster.
+		    PLL override data, ACC level and virtual corner used
+		    by the OSM hardware for each supported DCVS setpoint
+		    of the Performance cluster.
 
 - qcom,osm-no-tz
 	Usage:      optional
@@ -317,55 +319,55 @@ Example:
 		interrupt-names = "pwrcl-irq", "perfcl-irq";
 
 		qcom,pwrcl-speedbin0-v0 =
-			< 300000000  0x0004000f 0x031e001e 0x1>,
-			< 345600000  0x05040012 0x04200020 0x1>,
-			< 422400000  0x05040016 0x04200020 0x1>,
-			< 499200000  0x0504001a 0x05200020 0x1>,
-			< 576000000  0x0504001e 0x06200020 0x1>,
-			< 633600000  0x04040021 0x07200020 0x1>,
-			< 710400000  0x04040025 0x07200020 0x1>,
-			< 806400000  0x0404002a 0x08220022 0x2>,
-			< 883200000  0x0404002e 0x09250025 0x2>,
-			< 960000000  0x04040032 0x0a280028 0x2>,
-			< 1036800000 0x04040036 0x0b2b002b 0x3>,
-			< 1113600000 0x0404003a 0x0c2e002e 0x3>,
-			< 1190400000 0x0404003e 0x0c320032 0x3>,
-			< 1248000000 0x04040041 0x0d340034 0x3>,
-			< 1324800000 0x04040045 0x0e370037 0x3>,
-			< 1401600000 0x04040049 0x0f3a003a 0x3>,
-			< 1478400000 0x0404004d 0x103e003e 0x3>,
-			< 1574400000 0x04040052 0x10420042 0x4>,
-			< 1651200000 0x04040056 0x11450045 0x4>,
-			< 1728000000 0x0404005a 0x12480048 0x4>,
-			< 1804800000 0x0404005e 0x134b004b 0x4>,
-			< 1881600000 0x04040062 0x144e004e 0x4>;
+			< 300000000  0x0004000f 0x031e001e 0x1 1 >,
+			< 345600000  0x05040012 0x04200020 0x1 2 >,
+			< 422400000  0x05040016 0x04200020 0x1 3 >,
+			< 499200000  0x0504001a 0x05200020 0x1 4 >,
+			< 576000000  0x0504001e 0x06200020 0x1 5 >,
+			< 633600000  0x04040021 0x07200020 0x1 6 >,
+			< 710400000  0x04040025 0x07200020 0x1 7 >,
+			< 806400000  0x0404002a 0x08220022 0x2 8 >,
+			< 883200000  0x0404002e 0x09250025 0x2 9 >,
+			< 960000000  0x04040032 0x0a280028 0x2 10 >,
+			< 1036800000 0x04040036 0x0b2b002b 0x3 11 >,
+			< 1113600000 0x0404003a 0x0c2e002e 0x3 12 >,
+			< 1190400000 0x0404003e 0x0c320032 0x3 13 >,
+			< 1248000000 0x04040041 0x0d340034 0x3 14 >,
+			< 1324800000 0x04040045 0x0e370037 0x3 15 >,
+			< 1401600000 0x04040049 0x0f3a003a 0x3 16 >,
+			< 1478400000 0x0404004d 0x103e003e 0x3 17 >,
+			< 1574400000 0x04040052 0x10420042 0x4 18 >,
+			< 1651200000 0x04040056 0x11450045 0x4 19 >,
+			< 1728000000 0x0404005a 0x12480048 0x4 20>,
+			< 1804800000 0x0404005e 0x134b004b 0x4 21 >,
+			< 1881600000 0x04040062 0x144e004e 0x4 22 >;
 
 		qcom,perfcl-speedbin0-v0 =
-			< 300000000  0x0004000f 0x03200020 0x1>,
-			< 345600000  0x05040012 0x04200020 0x1>,
-			< 422400000  0x05040016 0x04200020 0x1>,
-			< 480000000  0x05040019 0x05200020 0x1>,
-			< 556800000  0x0504001d 0x06200020 0x1>,
-			< 633600000  0x04040021 0x07200020 0x1>,
-			< 710400000  0x04040025 0x07200020 0x1>,
-			< 787200000  0x04040029 0x08210021 0x1>,
-			< 844800000  0x0404002c 0x09240024 0x2>,
-			< 902400000  0x0404002f 0x09260026 0x2>,
-			< 979200000  0x04040033 0x0a290029 0x2>,
-			< 1056000000 0x04040037 0x0b2c002c 0x2>,
-			< 1171200000 0x0404003d 0x0c300030 0x3>,
-			< 1248000000 0x04040041 0x0d340034 0x3>,
-			< 1324800000 0x04040045 0x0e370037 0x3>,
-			< 1401600000 0x04040049 0x0f3b003b 0x3>,
-			< 1478400000 0x0404004d 0x0f3e003e 0x3>,
-			< 1536000000 0x04040050 0x10400040 0x3>,
-			< 1632000000 0x04040055 0x11440044 0x4>,
-			< 1708800000 0x04040059 0x12480048 0x4>,
-			< 1785600000 0x0404005d 0x134a004a 0x4>,
-			< 1862400000 0x04040061 0x134e004e 0x4>,
-			< 1939200000 0x04040065 0x14510051 0x4>,
-			< 2016000000 0x04040069 0x15540054 0x4>,
-			< 2092800000 0x0404006d 0x16570057 0x4>;
+			< 300000000  0x0004000f 0x03200020 0x1 1 >,
+			< 345600000  0x05040012 0x04200020 0x1 2 >,
+			< 422400000  0x05040016 0x04200020 0x1 3 >,
+			< 480000000  0x05040019 0x05200020 0x1 4 >,
+			< 556800000  0x0504001d 0x06200020 0x1 5 >,
+			< 633600000  0x04040021 0x07200020 0x1 6 >,
+			< 710400000  0x04040025 0x07200020 0x1 7 >,
+			< 787200000  0x04040029 0x08210021 0x1 8 >,
+			< 844800000  0x0404002c 0x09240024 0x2 9 >,
+			< 902400000  0x0404002f 0x09260026 0x2 10 >,
+			< 979200000  0x04040033 0x0a290029 0x2 11 >,
+			< 1056000000 0x04040037 0x0b2c002c 0x2 12 >,
+			< 1171200000 0x0404003d 0x0c300030 0x3 13 >,
+			< 1248000000 0x04040041 0x0d340034 0x3 14 >,
+			< 1324800000 0x04040045 0x0e370037 0x3 15 >,
+			< 1401600000 0x04040049 0x0f3b003b 0x3 16 >,
+			< 1478400000 0x0404004d 0x0f3e003e 0x3 17 >,
+			< 1536000000 0x04040050 0x10400040 0x3 18 >,
+			< 1632000000 0x04040055 0x11440044 0x4 19 >,
+			< 1708800000 0x04040059 0x12480048 0x4 20 >,
+			< 1785600000 0x0404005d 0x134a004a 0x4 21 >,
+			< 1862400000 0x04040061 0x134e004e 0x4 22 >,
+			< 1939200000 0x04040065 0x14510051 0x4 23 >,
+			< 2016000000 0x04040069 0x15540054 0x4 24 >,
+			< 2092800000 0x0404006d 0x16570057 0x4 25 >;
 
 		qcom,osm-no-tz;
 		qcom,osm-pll-setup;
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
index 8a8d65887441..cac11da9a962 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
@@ -28,88 +28,89 @@
 	compatible = "qcom,cpu-clock-osm-msmcobalt-v2";
 	/delete-property/ qcom,llm-sw-overr;
 	qcom,pwrcl-speedbin0-v0 =
-		<   300000000 0x0004000f 0x01200020 0x1 >,
-		<   364800000 0x05040013 0x01200020 0x1 >,
-		<   441600000 0x05040017 0x02200020 0x1 >,
-		<   518400000 0x0504001b 0x02200020 0x1 >,
-		<   595200000 0x0504001f 0x02200020 0x1 >,
-		<   672000000 0x05040023 0x03200020 0x1 >,
-		<   748800000 0x05040027 0x03200020 0x1 >,
-		<   825600000 0x0404002b 0x03220022 0x1 >,
-		<   883200000 0x0404002e 0x04250025 0x1 >,
-		<   960000000 0x04040032 0x04280028 0x1 >,
-		<  1036800000 0x04040036 0x042b002b 0x1 >,
-		<  1094400000 0x04040039 0x052e002e 0x2 >,
-		<  1171200000 0x0404003d 0x05310031 0x2 >,
-		<  1248000000 0x04040041 0x05340034 0x2 >,
-		<  1324800000 0x04040045 0x06370037 0x2 >,
-		<  1401600000 0x04040049 0x063a003a 0x2 >,
-		<  1478400000 0x0404004d 0x073e003e 0x2 >,
-		<  1555200000 0x04040051 0x07410041 0x2 >,
-		<  1670400000 0x04040057 0x08460046 0x2 >,
-		<  1747200000 0x0404005b 0x08490049 0x2 >,
-		<  1824000000 0x0404005f 0x084c004c 0x3 >,
-		<  1900800000 0x04040063 0x094f004f 0x3 >;
+		<   300000000 0x0004000f 0x01200020 0x1 1 >,
+		<   364800000 0x05040013 0x01200020 0x1 2 >,
+		<   441600000 0x05040017 0x02200020 0x1 3 >,
+		<   518400000 0x0504001b 0x02200020 0x1 4 >,
+		<   595200000 0x0504001f 0x02200020 0x1 5 >,
+		<   672000000 0x05040023 0x03200020 0x1 6 >,
+		<   748800000 0x05040027 0x03200020 0x1 7 >,
+		<   825600000 0x0404002b 0x03220022 0x1 8 >,
+		<   883200000 0x0404002e 0x04250025 0x1 9 >,
+		<   960000000 0x04040032 0x04280028 0x1 10 >,
+		<  1036800000 0x04040036 0x042b002b 0x1 11 >,
+		<  1094400000 0x04040039 0x052e002e 0x2 12 >,
+		<  1171200000 0x0404003d 0x05310031 0x2 13 >,
+		<  1248000000 0x04040041 0x05340034 0x2 14 >,
+		<  1324800000 0x04040045 0x06370037 0x2 15 >,
+		<  1401600000 0x04040049 0x063a003a 0x2 16 >,
+		<  1478400000 0x0404004d 0x073e003e 0x2 17 >,
+		<  1555200000 0x04040051 0x07410041 0x2 18 >,
+		<  1670400000 0x04040057 0x08460046 0x2 19 >,
+		<  1747200000 0x0404005b 0x08490049 0x2 20 >,
+		<  1824000000 0x0404005f 0x084c004c 0x3 21 >,
+		<  1900800000 0x04040063 0x094f004f 0x3 22 >;
 
 	qcom,perfcl-speedbin0-v0 =
-		<   300000000 0x0004000f 0x01200020 0x1 >,
-		<   345600000 0x05040012 0x01200020 0x1 >,
-		<   422400000 0x05040016 0x02200020 0x1 >,
-		<   499200000 0x0504001a 0x02200020 0x1 >,
-		<   576000000 0x0504001e 0x02200020 0x1 >,
-		<   652800000 0x05040022 0x03200020 0x1 >,
-		<   729600000 0x05040026 0x03200020 0x1 >,
-		<   806400000 0x0504002a 0x03220022 0x1 >,
-		<   902400000 0x0404002f 0x04260026 0x1 >,
-		<   979200000 0x04040033 0x04290029 0x1 >,
-		<  1056000000 0x04040037 0x052c002c 0x1 >,
-		<  1132800000 0x0404003b 0x052f002f 0x1 >,
-		<  1190400000 0x0404003e 0x05320032 0x2 >,
-		<  1267200000 0x04040042 0x06350035 0x2 >,
-		<  1344000000 0x04040046 0x06380038 0x2 >,
-		<  1420800000 0x0404004a 0x063b003b 0x2 >,
-		<  1497600000 0x0404004e 0x073e003e 0x2 >,
-		<  1574400000 0x04040052 0x07420042 0x2 >,
-		<  1651200000 0x04040056 0x07450045 0x2 >,
-		<  1728000000 0x0404005a 0x08480048 0x2 >,
-		<  1804800000 0x0404005e 0x084b004b 0x2 >,
-		<  1881600000 0x04040062 0x094e004e 0x2 >,
-		<  1958400000 0x04040066 0x09520052 0x2 >,
-		<  2035200000 0x0404006a 0x09550055 0x3 >,
-		<  2112000000 0x0404006e 0x0a580058 0x3 >,
-		<  2188800000 0x04040072 0x0a5b005b 0x3 >,
-		<  2265600000 0x04040076 0x0a5e005e 0x3 >,
-		<  2342400000 0x0404007a 0x0a620062 0x3 >,
-		<  2419200000 0x0404007e 0x0a650065 0x3 >,
-		<  2496000000 0x04040082 0x0a680068 0x3 >;
+		<   300000000 0x0004000f 0x01200020 0x1 1 >,
+		<   345600000 0x05040012 0x01200020 0x1 2 >,
+		<   422400000 0x05040016 0x02200020 0x1 3 >,
+		<   499200000 0x0504001a 0x02200020 0x1 4 >,
+		<   576000000 0x0504001e 0x02200020 0x1 5 >,
+		<   652800000 0x05040022 0x03200020 0x1 6 >,
+		<   729600000 0x05040026 0x03200020 0x1 7 >,
+		<   806400000 0x0504002a 0x03220022 0x1 8 >,
+		<   902400000 0x0404002f 0x04260026 0x1 9 >,
+		<   979200000 0x04040033 0x04290029 0x1 10 >,
+		<  1056000000 0x04040037 0x052c002c 0x1 11 >,
+		<  1132800000 0x0404003b 0x052f002f 0x1 12 >,
+		<  1190400000 0x0404003e 0x05320032 0x2 13 >,
+		<  1267200000 0x04040042 0x06350035 0x2 14 >,
+		<  1344000000 0x04040046 0x06380038 0x2 15 >,
+		<  1420800000 0x0404004a 0x063b003b 0x2 16 >,
+		<  1497600000 0x0404004e 0x073e003e 0x2 17 >,
+		<  1574400000 0x04040052 0x07420042 0x2 18 >,
+		<  1651200000 0x04040056 0x07450045 0x2 19 >,
+		<  1728000000 0x0404005a 0x08480048 0x2 20 >,
+		<  1804800000 0x0404005e 0x084b004b 0x2 21 >,
+		<  1881600000 0x04040062 0x094e004e 0x2 22 >,
+		<  1958400000 0x04040066 0x09520052 0x2 23 >,
+		<  2035200000 0x0404006a 0x09550055 0x3 24 >,
+		<  2112000000 0x0404006e 0x0a580058 0x3 25 >,
+		<  2188800000 0x04040072 0x0a5b005b 0x3 26 >,
+		<  2265600000 0x04040076 0x0a5e005e 0x3 27 >,
+		<  2342400000 0x0404007a 0x0a620062 0x3 28 >,
+		<  2419200000 0x0404007e 0x0a650065 0x3 29 >,
+		<  2496000000 0x04040082 0x0a680068 0x3 30 >;
 
 	qcom,perfcl-speedbin1-v0 =
-		<   300000000 0x0004000f 0x01200020 0x1 >,
-		<   345600000 0x05040012 0x01200020 0x1 >,
-		<   422400000 0x05040016 0x02200020 0x1 >,
-		<   499200000 0x0504001a 0x02200020 0x1 >,
-		<   576000000 0x0504001e 0x02200020 0x1 >,
-		<   652800000 0x05040022 0x03200020 0x1 >,
-		<   729600000 0x05040026 0x03200020 0x1 >,
-		<   806400000 0x0504002a 0x03220022 0x1 >,
-		<   902400000 0x0404002f 0x04260026 0x1 >,
-		<   979200000 0x04040033 0x04290029 0x1 >,
-		<  1056000000 0x04040037 0x052c002c 0x1 >,
-		<  1132800000 0x0404003b 0x052f002f 0x1 >,
-		<  1190400000 0x0404003e 0x05320032 0x2 >,
-		<  1267200000 0x04040042 0x06350035 0x2 >,
-		<  1344000000 0x04040046 0x06380038 0x2 >,
-		<  1420800000 0x0404004a 0x063b003b 0x2 >,
-		<  1497600000 0x0404004e 0x073e003e 0x2 >,
-		<  1574400000 0x04040052 0x07420042 0x2 >,
-		<  1651200000 0x04040056 0x07450045 0x2 >,
-		<  1728000000 0x0404005a 0x08480048 0x2 >,
-		<  1804800000 0x0404005e 0x084b004b 0x2 >,
-		<  1881600000 0x04040062 0x094e004e 0x2 >,
-		<  1958400000 0x04040066 0x09520052 0x2 >,
-		<  2035200000 0x0404006a 0x09550055 0x3 >,
-		<  2112000000 0x0404006e 0x0a580058 0x3 >,
-		<  2208000000 0x04040073 0x0a5c005c 0x3 >;
+		<   300000000 0x0004000f 0x01200020 0x1 1 >,
+		<   345600000 0x05040012 0x01200020 0x1 2 >,
+		<   422400000 0x05040016 0x02200020 0x1 3 >,
+		<   499200000 0x0504001a 0x02200020 0x1 4 >,
+		<   576000000 0x0504001e 0x02200020 0x1 5 >,
+		<   652800000 0x05040022 0x03200020 0x1 6 >,
+		<   729600000 0x05040026 0x03200020 0x1 7 >,
+		<   806400000 0x0504002a 0x03220022 0x1 8 >,
+		<   902400000 0x0404002f 0x04260026 0x1 9 >,
+		<   979200000 0x04040033 0x04290029 0x1 10 >,
+		<  1056000000 0x04040037 0x052c002c 0x1 11 >,
+		<  1132800000 0x0404003b 0x052f002f 0x1 12 >,
+		<  1190400000 0x0404003e 0x05320032 0x2 13 >,
+		<  1267200000 0x04040042 0x06350035 0x2 14 >,
+		<  1344000000 0x04040046 0x06380038 0x2 15 >,
+		<  1420800000 0x0404004a 0x063b003b 0x2 16 >,
+		<  1497600000 0x0404004e 0x073e003e 0x2 17 >,
+		<  1574400000 0x04040052 0x07420042 0x2 18 >,
+		<  1651200000 0x04040056 0x07450045 0x2 19 >,
+		<  1728000000 0x0404005a 0x08480048 0x2 20 >,
+		<  1804800000 0x0404005e 0x084b004b 0x2 21 >,
+		<  1881600000 0x04040062 0x094e004e 0x2 22 >,
+		<  1958400000 0x04040066 0x09520052 0x2 23 >,
+		<  2035200000 0x0404006a 0x09550055 0x3 24 >,
+		<  2112000000 0x0404006e 0x0a580058 0x3 25 >,
+		<  2208000000 0x04040073 0x0a5c005c 0x3 26 >,
+		<  2304000000 0x04010078 0x0a5c005c 0x3 26 >;
 };
 
 &msm_cpufreq {
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
index d3f50aa267c5..33830aefcf36 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
@@ -823,55 +823,55 @@
 		interrupt-names = "pwrcl-irq", "perfcl-irq";
 
 		qcom,pwrcl-speedbin0-v0 =
-			<   300000000 0x0004000f 0x01200020 0x1 >,
-			<   345600000 0x05040012 0x02200020 0x1 >,
-			<   422400000 0x05040016 0x02200020 0x1 >,
-			<   499200000 0x0504001a 0x02200020 0x1 >,
-			<   576000000 0x0504001e 0x03200020 0x1 >,
-			<   633600000 0x05040021 0x03200020 0x1 >,
-			<   710400000 0x05040025 0x03200020 0x1 >,
-			<   806400000 0x0504002a 0x04200020 0x1 >,
-			<   883200000 0x0404002e 0x04250025 0x1 >,
-			<   960000000 0x04040032 0x05280028 0x1 >,
-			<  1036800000 0x04040036 0x052b002b 0x2 >,
-			<  1113600000 0x0404003a 0x052e002e 0x2 >,
-			<  1190400000 0x0404003e 0x06320032 0x2 >,
-			<  1248000000 0x04040041 0x06340034 0x2 >,
-			<  1324800000 0x04040045 0x06370037 0x2 >,
-			<  1401600000 0x04040049 0x073a003a 0x2 >,
-			<  1478400000 0x0404004d 0x073e003e 0x2 >,
-			<  1574400000 0x04040052 0x08420042 0x2 >,
-			<  1651200000 0x04040056 0x08450045 0x2 >,
-			<  1728000000 0x0404005a 0x08480048 0x2 >,
-			<  1804800000 0x0404005e 0x094b004b 0x3 >,
-			<  1881600000 0x04040062 0x094e004e 0x3 >;
+			<   300000000 0x0004000f 0x01200020 0x1 1 >,
+			<   345600000 0x05040012 0x02200020 0x1 2 >,
+			<   422400000 0x05040016 0x02200020 0x1 3 >,
+			<   499200000 0x0504001a 0x02200020 0x1 4 >,
+			<   576000000 0x0504001e 0x03200020 0x1 5 >,
+			<   633600000 0x05040021 0x03200020 0x1 6 >,
+			<   710400000 0x05040025 0x03200020 0x1 7 >,
+			<   806400000 0x0504002a 0x04200020 0x1 8 >,
+			<   883200000 0x0404002e 0x04250025 0x1 9 >,
+			<   960000000 0x04040032 0x05280028 0x1 10 >,
+			<  1036800000 0x04040036 0x052b002b 0x2 11 >,
+			<  1113600000 0x0404003a 0x052e002e 0x2 12 >,
+			<  1190400000 0x0404003e 0x06320032 0x2 13 >,
+			<  1248000000 0x04040041 0x06340034 0x2 14 >,
+			<  1324800000 0x04040045 0x06370037 0x2 15 >,
+			<  1401600000 0x04040049 0x073a003a 0x2 16 >,
+			<  1478400000 0x0404004d 0x073e003e 0x2 17 >,
+			<  1574400000 0x04040052 0x08420042 0x2 18 >,
+			<  1651200000 0x04040056 0x08450045 0x2 19 >,
+			<  1728000000 0x0404005a 0x08480048 0x2 20 >,
+			<  1804800000 0x0404005e 0x094b004b 0x3 21 >,
+			<  1881600000 0x04040062 0x094e004e 0x3 22 >;
 
 		qcom,perfcl-speedbin0-v0 =
-			<   300000000 0x0004000f 0x01200020 0x1 >,
-			<   345600000 0x05040012 0x02200020 0x1 >,
-			<   422400000 0x05040016 0x02200020 0x1 >,
-			<   480000000 0x05040019 0x02200020 0x1 >,
-			<   556800000 0x0504001d 0x03200020 0x1 >,
-			<   633600000 0x05040021 0x03200020 0x1 >,
-			<   710400000 0x05040025 0x03200020 0x1 >,
-			<   787200000 0x05040029 0x04200020 0x1 >,
-			<   844800000 0x0404002c 0x04230023 0x1 >,
-			<   902400000 0x0404002f 0x04260026 0x1 >,
-			<   979200000 0x04040033 0x05290029 0x1 >,
-			<  1056000000 0x04040037 0x052c002c 0x1 >,
-			<  1171200000 0x0404003d 0x06310031 0x2 >,
-			<  1248000000 0x04040041 0x06340034 0x2 >,
-			<  1324800000 0x04040045 0x06370037 0x2 >,
-			<  1401600000 0x04040049 0x073a003a 0x2 >,
-			<  1478400000 0x0404004d 0x073e003e 0x2 >,
-			<  1536000000 0x04040050 0x07400040 0x2 >,
-			<  1632000000 0x04040055 0x08440044 0x2 >,
-			<  1708800000 0x04040059 0x08470047 0x2 >,
-			<  1785600000 0x0404005d 0x094a004a 0x2 >,
-			<  1862400000 0x04040061 0x094e004e 0x2 >,
-			<  1939200000 0x04040065 0x09510051 0x3 >,
-			<  2016000000 0x04040069 0x0a540054 0x3 >,
-			<  2092800000 0x0404006d 0x0a570057 0x3 >;
+			<   300000000 0x0004000f 0x01200020 0x1 1 >,
+			<   345600000 0x05040012 0x02200020 0x1 2 >,
+			<   422400000 0x05040016 0x02200020 0x1 3 >,
+			<   480000000 0x05040019 0x02200020 0x1 4 >,
+			<   556800000 0x0504001d 0x03200020 0x1 5 >,
+			<   633600000 0x05040021 0x03200020 0x1 6 >,
+			<   710400000 0x05040025 0x03200020 0x1 7 >,
+			<   787200000 0x05040029 0x04200020 0x1 8 >,
+			<   844800000 0x0404002c 0x04230023 0x1 9 >,
+			<   902400000 0x0404002f 0x04260026 0x1 10 >,
+			<   979200000 0x04040033 0x05290029 0x1 11 >,
+			<  1056000000 0x04040037 0x052c002c 0x1 12 >,
+			<  1171200000 0x0404003d 0x06310031 0x2 13 >,
+			<  1248000000 0x04040041 0x06340034 0x2 14 >,
+			<  1324800000 0x04040045 0x06370037 0x2 15 >,
+			<  1401600000 0x04040049 0x073a003a 0x2 16 >,
+			<  1478400000 0x0404004d 0x073e003e 0x2 17 >,
+			<  1536000000 0x04040050 0x07400040 0x2 18 >,
+			<  1632000000 0x04040055 0x08440044 0x2 19 >,
+			<  1708800000 0x04040059 0x08470047 0x2 20 >,
+			<  1785600000 0x0404005d 0x094a004a 0x2 21 >,
+			<  1862400000 0x04040061 0x094e004e 0x2 22 >,
+			<  1939200000 0x04040065 0x09510051 0x3 23 >,
+			<  2016000000 0x04040069 0x0a540054 0x3 24 >,
+			<  2092800000 0x0404006d 0x0a570057 0x3 25 >;
 
 		qcom,up-timer =
 			<1000 1000>;
diff --git a/drivers/clk/msm/clock-osm.c b/drivers/clk/msm/clock-osm.c
index 8ae6a4e994f0..68274765a6c1 100644
--- a/drivers/clk/msm/clock-osm.c
+++ b/drivers/clk/msm/clock-osm.c
@@ -57,6 +57,7 @@ enum clk_osm_lut_data {
 	FREQ_DATA,
 	PLL_OVERRIDES,
 	SPARE_DATA,
+	VIRTUAL_CORNER,
 	NUM_FIELDS,
 };
 
@@ -406,12 +407,24 @@ static long clk_osm_list_rate(struct clk *c, unsigned n)
 static long clk_osm_round_rate(struct clk *c, unsigned long rate)
 {
 	int i;
+	unsigned long rrate = 0;
 
-	for (i = 0; i < c->num_fmax; i++)
-		if (rate <= c->fmax[i])
-			return c->fmax[i];
+	/*
+	 * If the rate passed in is 0, return the first frequency in
+	 * the FMAX table.
+	 */
+	if (!rate)
+		return c->fmax[0];
+
+	for (i = 0; i < c->num_fmax; i++) {
+		if (is_better_rate(rate, rrate, c->fmax[i])) {
+			rrate = c->fmax[i];
+			if (rrate == rate)
+				break;
+		}
+	}
 
-	return c->fmax[i-1];
+	return rrate;
 }
 
 static int clk_osm_search_table(struct osm_entry *table, int entries, long rate)
@@ -581,19 +594,21 @@ static void clk_osm_print_osm_table(struct clk_osm *c)
 {
 	int i;
 	struct osm_entry *table = c->osm_table;
-	u32 pll_src, pll_div, lval;
+	u32 pll_src, pll_div, lval, core_count;
 
-	pr_debug("Index, Frequency, VC, OLV (mv), PLL Src, PLL Div, L-Val, ACC Level\n");
+	pr_debug("Index, Frequency, VC, OLV (mv), Core Count, PLL Src, PLL Div, L-Val, ACC Level\n");
 	for (i = 0; i < c->num_entries; i++) {
 		pll_src = (table[i].freq_data & GENMASK(27, 26)) >> 26;
 		pll_div = (table[i].freq_data & GENMASK(25, 24)) >> 24;
 		lval = table[i].freq_data & GENMASK(7, 0);
+		core_count = (table[i].freq_data & GENMASK(18, 16)) >> 16;
 
-		pr_debug("%3d, %11lu, %2u, %5u, %6u, %8u, %7u, %5u\n",
+		pr_debug("%3d, %11lu, %2u, %5u, %2u, %6u, %8u, %7u, %5u\n",
 			i,
 			table[i].frequency,
 			table[i].virtual_corner,
 			table[i].open_loop_volt,
+			core_count,
 			pll_src,
 			pll_div,
 			lval,
@@ -655,14 +670,17 @@ static int clk_osm_get_lut(struct platform_device *pdev,
 		c->osm_table[j].freq_data = array[i + FREQ_DATA];
 		c->osm_table[j].override_data = array[i + PLL_OVERRIDES];
 		c->osm_table[j].spare_data = array[i + SPARE_DATA];
-		pr_debug("index=%d freq=%ld freq_data=0x%x override_data=0x%x spare_data=0x%x\n",
+		/* Voltage corners are 0 based in the OSM LUT */
+		c->osm_table[j].virtual_corner = array[i + VIRTUAL_CORNER] - 1;
+		pr_debug("index=%d freq=%ld virtual_corner=%d freq_data=0x%x override_data=0x%x spare_data=0x%x\n",
 			 j, c->osm_table[j].frequency,
+			 c->osm_table[j].virtual_corner,
 			 c->osm_table[j].freq_data,
 			 c->osm_table[j].override_data,
 			 c->osm_table[j].spare_data);
 
 		data = (array[i + FREQ_DATA] & GENMASK(18, 16)) >> 16;
-		if (!last_entry && data == MAX_CONFIG) {
+		if (!last_entry) {
 			clk->fmax[k] = array[i];
 			k++;
 		}
@@ -1143,77 +1161,25 @@ static int clk_osm_setup_hw_table(struct clk_osm *c)
 static int clk_osm_resolve_open_loop_voltages(struct clk_osm *c)
 {
 	struct regulator *regulator = c->vdd_reg;
-	struct dev_pm_opp *opp;
-	unsigned long freq;
-	u32 vc, mv, data;
-	int i, rc = 0;
+	u32 vc, mv;
+	int i;
 
-	/*
-	 * Determine frequency -> virtual corner -> open-loop voltage
-	 * mapping from the OPP table.
-	 */
 	for (i = 0; i < OSM_TABLE_SIZE; i++) {
-		freq = c->osm_table[i].frequency;
-		/*
-		 * Only frequencies that are supported across all configurations
-		 * are present in the OPP table associated with the regulator
-		 * device.
-		 */
-		data = (c->osm_table[i].freq_data & GENMASK(18, 16)) >> 16;
-		if (data != MAX_CONFIG) {
-			if (i < 1) {
-				pr_err("Invalid LUT entry at index 0\n");
-				return -EINVAL;
-			}
-			c->osm_table[i].open_loop_volt =
-				c->osm_table[i-1].open_loop_volt;
-			c->osm_table[i].virtual_corner =
-				c->osm_table[i-1].virtual_corner;
-			continue;
-		}
-
-		rcu_read_lock();
-		opp = dev_pm_opp_find_freq_exact(&c->vdd_dev->dev, freq, true);
-		if (IS_ERR(opp)) {
-			rc = PTR_ERR(opp);
-			if (rc == -ERANGE)
-				pr_err("Frequency %lu not found\n", freq);
-			goto exit;
-		}
-
-		vc = dev_pm_opp_get_voltage(opp);
-		if (!vc) {
-			pr_err("No virtual corner found for frequency %lu\n",
-			       freq);
-			rc = -ERANGE;
-			goto exit;
-		}
-
-		rcu_read_unlock();
-
+		vc = c->osm_table[i].virtual_corner + 1;
 		/* Voltage is in uv. Convert to mv */
 		mv = regulator_list_corner_voltage(regulator, vc) / 1000;
-
-		/* CPR virtual corners are zero-based numbered */
-		vc--;
 		c->osm_table[i].open_loop_volt = mv;
-		c->osm_table[i].virtual_corner = vc;
 	}
 
 	return 0;
-exit:
-	rcu_read_unlock();
-	return rc;
 }
 
 static int clk_osm_resolve_crossover_corners(struct clk_osm *c,
 				     struct platform_device *pdev)
 {
 	struct regulator *regulator = c->vdd_reg;
-	struct dev_pm_opp *opp;
-	unsigned long freq = 0;
-	int vc, i, threshold, rc = 0;
-	u32 corner_volt, data;
+	int count, vc, i, threshold, rc = 0;
+	u32 corner_volt;
 
 	rc = of_property_read_u32(pdev->dev.of_node,
 				  "qcom,apm-threshold-voltage",
@@ -1224,70 +1190,26 @@ static int clk_osm_resolve_crossover_corners(struct clk_osm *c,
 	}
 
 	/* Determine crossover virtual corner */
-	rcu_read_lock();
-	opp = dev_pm_opp_find_freq_exact(&c->vdd_dev->dev, freq, true);
-	if (IS_ERR(opp)) {
-		rc = PTR_ERR(opp);
-		if (rc == -ERANGE)
-			pr_debug("APM placeholder frequency entry not found\n");
-		goto exit;
+	count = regulator_count_voltages(regulator);
+	if (count < 0) {
+		pr_err("Failed to get the number of virtual corners supported\n");
+		return count;
 	}
-	vc = dev_pm_opp_get_voltage(opp);
-	if (!vc) {
-		pr_debug("APM crossover corner not found\n");
-		rc = -ERANGE;
-		goto exit;
-	}
-	rcu_read_unlock();
-	vc--;
-	c->apm_crossover_vc = vc;
+
+	c->apm_crossover_vc = count - 1;
 
 	/* Determine threshold virtual corner */
 	for (i = 0; i < OSM_TABLE_SIZE; i++) {
-		freq = c->osm_table[i].frequency;
-		/*
-		 * Only frequencies that are supported across all configurations
-		 * are present in the OPP table associated with the regulator
-		 * device.
-		 */
-		data = (c->osm_table[i].freq_data & GENMASK(18, 16)) >> 16;
-		if (data != MAX_CONFIG)
-			continue;
-
-		rcu_read_lock();
-		opp = dev_pm_opp_find_freq_exact(&c->vdd_dev->dev, freq, true);
-		if (IS_ERR(opp)) {
-			rc = PTR_ERR(opp);
-			if (rc == -ERANGE)
-				pr_err("Frequency %lu not found\n", freq);
-			goto exit;
-		}
-
-		vc = dev_pm_opp_get_voltage(opp);
-		if (!vc) {
-			pr_err("No virtual corner found for frequency %lu\n",
-			       freq);
-			rc = -ERANGE;
-			goto exit;
-		}
-
-		rcu_read_unlock();
-
+		vc = c->osm_table[i].virtual_corner + 1;
 		corner_volt = regulator_list_corner_voltage(regulator, vc);
 
-		/* CPR virtual corners are zero-based numbered */
-		vc--;
-
 		if (corner_volt >= threshold) {
-			c->apm_threshold_vc = vc;
+			c->apm_threshold_vc = c->osm_table[i].virtual_corner;
 			break;
 		}
 	}
 
 	return 0;
-exit:
-	rcu_read_unlock();
-	return rc;
 }
 
 static int clk_osm_set_cc_policy(struct platform_device *pdev)