diff options
| author | Thang Q. Nguyen <tqnguyen@apm.com> | 2012-04-17 15:43:13 +0700 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@redhat.com> | 2012-07-25 15:13:53 -0400 |
| commit | 3a8b788f61a5b85f3a3a4630dc5f4c13b91e1bba (patch) | |
| tree | 6424c2e9b394548f9ffd279910ccfc4305c402d4 | |
| parent | 2fc75da0c59634b81223af497c4a037822f6e457 (diff) | |
sata_dwc_460ex: support hardreset
The hardreset operation is currently not supported. This causes
sometime the SATA driver does cause kernel crash because of
none-determined state.a This patch will fix the issue.
Signed-off-by: Thang Q. Nguyen <tqnguyen@apm.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| -rw-r--r-- | drivers/ata/sata_dwc_460ex.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index 69f7cde49c6b..ae13ef1945ba 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -1581,10 +1581,31 @@ static void sata_dwc_qc_prep(struct ata_queued_cmd *qc) static void sata_dwc_error_handler(struct ata_port *ap) { - ap->link.flags |= ATA_LFLAG_NO_HRST; ata_sff_error_handler(ap); } +int sata_dwc_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) +{ + struct sata_dwc_device *hsdev = HSDEV_FROM_AP(link->ap); + int ret; + + ret = sata_sff_hardreset(link, class, deadline); + + sata_dwc_enable_interrupts(hsdev); + + /* Reconfigure the DMA control register */ + out_le32(&hsdev->sata_dwc_regs->dmacr, + SATA_DWC_DMACR_TXRXCH_CLEAR); + + /* Reconfigure the DMA Burst Transaction Size register */ + out_le32(&hsdev->sata_dwc_regs->dbtsr, + SATA_DWC_DBTSR_MWR(AHB_DMA_BRST_DFLT) | + SATA_DWC_DBTSR_MRD(AHB_DMA_BRST_DFLT)); + + return ret; +} + /* * scsi mid-layer and libata interface structures */ @@ -1604,6 +1625,7 @@ static struct ata_port_operations sata_dwc_ops = { .inherits = &ata_sff_port_ops, .error_handler = sata_dwc_error_handler, + .hardreset = sata_dwc_hardreset, .qc_prep = sata_dwc_qc_prep, .qc_issue = sata_dwc_qc_issue, |