diff options
| author | Subbaraman Narayanamurthy <subbaram@codeaurora.org> | 2016-02-09 12:37:00 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 21:23:06 -0700 |
| commit | 3c3c947e7105d34682ae87c654acfda1cff097aa (patch) | |
| tree | b1cfeef2ba98f53d99f0968123062f5320144fe9 | |
| parent | 4997136235060a27eee947829a09514f97041cd0 (diff) | |
power: qpnp-fg: read rslow configuration during hw_init
Currently, rslow compensation active settings are applied and
cleared based on certain conditions. However, if the device goes
for a reset, the flag used by FG driver to save the setting done
will vanish. For e.g. if an active setting is applied and the
device goes for a reset, even if there is a condition present to
clear the active setting, it will not be applied. This is due to
the fact that the flag (rslow_comp.active) is not set in first
place even though FG HW has that setting applied. Fix this by
reading rslow configuration during hw_init and set the flag.
CRs-Fixed: 977626
Change-Id: Ib6d9f7d79335b027f7ed7ee24dfd5c9bb303228d
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
| -rw-r--r-- | drivers/power/qpnp-fg.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/power/qpnp-fg.c b/drivers/power/qpnp-fg.c index 04ba43c26989..8660c1f8c3f5 100644 --- a/drivers/power/qpnp-fg.c +++ b/drivers/power/qpnp-fg.c @@ -6248,6 +6248,20 @@ static int fg_common_hw_init(struct fg_chip *chip) if (fg_debug_mask & FG_STATUS) pr_info("imptr_pulse_slow is %sabled\n", chip->imptr_pulse_slow_en ? "en" : "dis"); + + rc = fg_mem_read(chip, &val, RSLOW_CFG_REG, 1, RSLOW_CFG_OFFSET, + 0); + if (rc) { + pr_err("unable to read rslow cfg: %d\n", rc); + return rc; + } + + if (val & RSLOW_CFG_ON_VAL) + chip->rslow_comp.active = true; + + if (fg_debug_mask & FG_STATUS) + pr_info("rslow_comp active is %sabled\n", + chip->rslow_comp.active ? "en" : "dis"); } return 0; |