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authorFlorian Fainelli <florian@openwrt.org>2008-08-22 17:00:22 +0200
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 16:18:44 +0100
commit3cd4e067a3e548a56a8b5e202552dcd18a2783a9 (patch)
tree90aec37b9415ac73f82e6cbb7ff80ca4e2c10d06
parent021635280d4572b9d9bb5481b00afea8a66b295f (diff)
MIPS: RB532: Cleanup and group definitions to their right places
This patch moves GPIO related definitions to gpio.h and IRQ related to irq.h Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/rb532/devices.c16
-rw-r--r--include/asm-mips/mach-rc32434/gpio.h9
-rw-r--r--include/asm-mips/mach-rc32434/irq.h5
3 files changed, 16 insertions, 14 deletions
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 82ab395efa33..7090dc97606f 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -34,21 +34,11 @@
#include <asm/mach-rc32434/rb.h>
#include <asm/mach-rc32434/integ.h>
#include <asm/mach-rc32434/gpio.h>
-
-#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0)
-#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1)
-#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
-#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
+#include <asm/mach-rc32434/irq.h>
#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
-/* NAND definitions */
-#define GPIO_RDY (1 << 0x08)
-#define GPIO_WPX (1 << 0x09)
-#define GPIO_ALE (1 << 0x0a)
-#define GPIO_CLE (1 << 0x0b)
-
static struct resource korina_dev0_res[] = {
{
.name = "korina_regs",
@@ -101,8 +91,6 @@ static struct platform_device korina_dev0 = {
.num_resources = ARRAY_SIZE(korina_dev0_res),
};
-#define CF_GPIO_NUM 13
-
static struct resource cf_slot0_res[] = {
{
.name = "cf_membase",
@@ -116,7 +104,7 @@ static struct resource cf_slot0_res[] = {
};
static struct cf_device cf_slot0_data = {
- .gpio_pin = 13
+ .gpio_pin = CF_GPIO_NUM
};
static struct platform_device cf_slot0 = {
diff --git a/include/asm-mips/mach-rc32434/gpio.h b/include/asm-mips/mach-rc32434/gpio.h
index f946f5f45bbb..4fe18dbacaf7 100644
--- a/include/asm-mips/mach-rc32434/gpio.h
+++ b/include/asm-mips/mach-rc32434/gpio.h
@@ -61,6 +61,15 @@ struct rb532_gpio_reg {
/* PCI messaging unit */
#define RC32434_PCI_MSU_GPIO (1 << 13)
+/* NAND GPIO signals */
+#define GPIO_RDY (1 << 0x08)
+#define GPIO_WPX (1 << 0x09)
+#define GPIO_ALE (1 << 0x0a)
+#define GPIO_CLE (1 << 0x0b)
+
+/* Compact Flash GPIO pin */
+#define CF_GPIO_NUM 13
+
extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val);
extern unsigned get_434_reg(unsigned reg_offs);
diff --git a/include/asm-mips/mach-rc32434/irq.h b/include/asm-mips/mach-rc32434/irq.h
index cb9e4725f5dc..d68318b6b76d 100644
--- a/include/asm-mips/mach-rc32434/irq.h
+++ b/include/asm-mips/mach-rc32434/irq.h
@@ -5,4 +5,9 @@
#include <asm/mach-generic/irq.h>
+#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0)
+#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1)
+#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
+#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
+
#endif /* __ASM_RC32434_IRQ_H */