diff options
author | Venkat Gopalakrishnan <venkatg@codeaurora.org> | 2015-01-21 15:51:37 -0800 |
---|---|---|
committer | Subhash Jadavani <subhashj@codeaurora.org> | 2016-05-31 15:26:07 -0700 |
commit | 8379862de2736e96861ff2fadbd1e21e335df1b0 (patch) | |
tree | 7b93f0eed48a1df4318dbb6e2a834dcec3717246 | |
parent | 3ef53ed8d2dd08999120f97c77ba0f8e2ec40047 (diff) |
mmc: sdhci-msm: Disable pm functionalities
Disable the following pm functionalities till they are functional:
* clk scaling (need to verify full functionality)
* clk gating (crashes when ungating the clock)
Change-Id: I0962d46d85415e77b978e1f7dd9f2f49446655bb
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
-rw-r--r-- | drivers/mmc/host/sdhci-msm.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index b3237a710b3c..ebc160a17ce6 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -1769,9 +1769,11 @@ static void sdhci_msm_bus_voting(struct sdhci_host *host, u32 enable) * after SDHCI_MSM_MMC_CLK_GATE_DELAY and thus no * additional delay is required to remove the bus vote. */ +#ifdef MMC_CLKGATE if (host->mmc->clkgate_delay) sdhci_msm_bus_cancel_work_and_set_vote(host, 0); else +#endif sdhci_msm_bus_queue_work(host); } } @@ -2506,7 +2508,7 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) curr_pwrsave = !!(readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC) & CORE_CLK_PWRSAVE); if ((clock > 400000) && - !curr_pwrsave && mmc_host_may_gate_card(host->mmc->card)) + !curr_pwrsave) writel_relaxed(readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC) | CORE_CLK_PWRSAVE, host->ioaddr + CORE_VENDOR_SPEC); @@ -2514,7 +2516,7 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) * Disable pwrsave for a newly added card if doesn't allow clock * gating. */ - else if (curr_pwrsave && !mmc_host_may_gate_card(host->mmc->card)) + else if (curr_pwrsave) writel_relaxed(readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC) & ~CORE_CLK_PWRSAVE, host->ioaddr + CORE_VENDOR_SPEC); @@ -3074,10 +3076,10 @@ static int sdhci_msm_probe(struct platform_device *pdev) /* Enable pwr irq interrupts */ writel_relaxed(INT_MASK, (msm_host->core_mem + CORE_PWRCTL_MASK)); - +#ifdef MMC_CLKGATE /* Set clock gating delay to be used when CONFIG_MMC_CLKGATE is set */ msm_host->mmc->clkgate_delay = SDHCI_MSM_MMC_CLK_GATE_DELAY; - +#endif /* Set host capabilities */ msm_host->mmc->caps |= msm_host->pdata->mmc_bus_width; msm_host->mmc->caps |= msm_host->pdata->caps; @@ -3086,7 +3088,6 @@ static int sdhci_msm_probe(struct platform_device *pdev) msm_host->mmc->caps2 |= MMC_CAP2_PACKED_WR_CONTROL; msm_host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC; msm_host->mmc->caps2 |= MMC_CAP2_FULL_PWR_CYCLE; - msm_host->mmc->caps2 |= MMC_CAP2_CLK_SCALE; msm_host->mmc->caps2 |= MMC_CAP2_ASYNC_SDIO_IRQ_4BIT_MODE; msm_host->mmc->caps2 |= MMC_CAP2_HS400_POST_TUNING; msm_host->mmc->pm_caps |= MMC_PM_KEEP_POWER; |