diff options
| author | Pierre Ossman <drzeus@drzeus.cx> | 2009-02-02 21:13:49 +0100 |
|---|---|---|
| committer | Pierre Ossman <drzeus@drzeus.cx> | 2009-02-18 06:36:22 +0100 |
| commit | 86a6a8749d5b8fd5c2b544fe9fd11101e3d0550f (patch) | |
| tree | 2433073578c513875bd69d9edb6f72c3fa846b97 | |
| parent | 444122fd58fdc83c96877a92b3f6288cafddb08d (diff) | |
Revert "sdhci: force high speed capability on some controllers"
This reverts commit a4b76193774b463b922cab2f92450efb20d29ef0.
It turned out that the controller had problem running at the
higher speed, so go back to trusting the hardware capability
bits.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
| -rw-r--r-- | drivers/mmc/host/sdhci-pci.c | 3 | ||||
| -rw-r--r-- | drivers/mmc/host/sdhci.c | 3 | ||||
| -rw-r--r-- | drivers/mmc/host/sdhci.h | 2 |
3 files changed, 2 insertions, 6 deletions
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index f07255cb17ee..8cff5f5e7f86 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -144,8 +144,7 @@ static int jmicron_probe(struct sdhci_pci_chip *chip) SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE | SDHCI_QUIRK_RESET_AFTER_REQUEST | - SDHCI_QUIRK_BROKEN_SMALL_PIO | - SDHCI_QUIRK_FORCE_HIGHSPEED; + SDHCI_QUIRK_BROKEN_SMALL_PIO; } /* diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 6b2d1f99af67..24d7414a3315 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1636,8 +1636,7 @@ int sdhci_add_host(struct sdhci_host *host) mmc->f_max = host->max_clk; mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; - if ((caps & SDHCI_CAN_DO_HISPD) || - (host->quirks & SDHCI_QUIRK_FORCE_HIGHSPEED)) + if (caps & SDHCI_CAN_DO_HISPD) mmc->caps |= MMC_CAP_SD_HIGHSPEED; mmc->ocr_avail = 0; diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 3efba2363941..ffeab227d95b 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -208,8 +208,6 @@ struct sdhci_host { #define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) /* Controller has an issue with buffer bits for small transfers */ #define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) -/* Controller supports high speed but doesn't have the caps bit set */ -#define SDHCI_QUIRK_FORCE_HIGHSPEED (1<<14) int irq; /* Device IRQ */ void __iomem * ioaddr; /* Mapped address */ |