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author | Linux Build Service Account <lnxbuild@localhost> | 2016-11-10 15:14:37 -0800 |
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committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-11-10 15:14:37 -0800 |
commit | 8f000b7b8eb964d228cc54add19d6ced36ab8f38 (patch) | |
tree | ad6a4ac677b6f4368d5df5af430f068584bb3b14 | |
parent | 982cdaebe089c6b2d528679a55d79827dc22557a (diff) | |
parent | 04d3e804c617067a3e98d0726c9a429426093509 (diff) |
Merge "ARM: dts: msm: Add IMEM pil entry for msmfalcon"
-rw-r--r-- | arch/arm/boot/dts/qcom/msmfalcon.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index 6a61f4828150..e8da3a7d460c 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -833,6 +833,19 @@ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; status = "ok"; }; + + qcom,msm-imem@146bf000 { + compatible = "qcom,msm-imem"; + reg = <0x146bf000 0x1000>; + ranges = <0x0 0x146bf000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + pil@94c { + compatible = "qcom,msm-imem-pil"; + reg = <0x94c 200>; + }; + }; }; #include "msmfalcon-ion.dtsi" |