diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2011-05-26 17:26:58 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2011-05-28 17:02:55 -0400 |
| commit | a4ffd956924e265865a4425bd888927059fd46a9 (patch) | |
| tree | f814f866a1d1528a0d9490e3d9f7fcfc143ef1ae | |
| parent | 427472c967977256db42ffbf16f65f2770278b7f (diff) | |
Blackfin: gptimers: add structure for hardware register layout
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| -rw-r--r-- | arch/blackfin/include/asm/gptimers.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h index c722acdda0d3..38657dac1235 100644 --- a/arch/blackfin/include/asm/gptimers.h +++ b/arch/blackfin/include/asm/gptimers.h @@ -193,4 +193,22 @@ uint16_t get_enabled_gptimers(void); uint32_t get_gptimer_status(unsigned int group); void set_gptimer_status(unsigned int group, uint32_t value); +/* + * All Blackfin system MMRs are padded to 32bits even if the register + * itself is only 16bits. So use a helper macro to streamline this. + */ +#define __BFP(m) u16 m; u16 __pad_##m + +/* + * bfin timer registers layout + */ +struct bfin_gptimer_regs { + __BFP(config); + u32 counter; + u32 period; + u32 width; +}; + +#undef __BFP + #endif |