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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-11-06 19:26:45 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-04-04 00:30:28 +0100
commitb07fd625ac9df7412bd996edbdc298eb343dd501 (patch)
tree5330c6978b5d8b17f3dcc45b2e2b840874d6d213
parentc5ed98b6ae79545284b7855a07ded32934865a6d (diff)
dmaengine: omap-dma: cleanup errata 3.3 handling
Provide a function to read the CSAC/CDAC register, working around the OMAP 3.2/3.3 erratum (which requires two reads of the register if the first returned zero. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--drivers/dma/omap-dma.c52
1 files changed, 29 insertions, 23 deletions
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index a1baada7dcd4..1e0018f36384 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -451,28 +451,39 @@ static size_t omap_dma_desc_size_pos(struct omap_desc *d, dma_addr_t addr)
return size;
}
+/*
+ * OMAP 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
+ * read before the DMA controller finished disabling the channel.
+ */
+static uint32_t omap_dma_chan_read_3_3(struct omap_chan *c, unsigned reg)
+{
+ struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device);
+ uint32_t val;
+
+ val = omap_dma_chan_read(c, reg);
+ if (val == 0 && od->plat->errata & DMA_ERRATA_3_3)
+ val = omap_dma_chan_read(c, reg);
+
+ return val;
+}
+
static dma_addr_t omap_dma_get_src_pos(struct omap_chan *c)
{
struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device);
- dma_addr_t addr;
+ dma_addr_t addr, cdac;
- if (__dma_omap15xx(od->plat->dma_attr))
+ if (__dma_omap15xx(od->plat->dma_attr)) {
addr = omap_dma_chan_read(c, CPC);
- else
- addr = omap_dma_chan_read(c, CSAC);
-
- if (od->plat->errata & DMA_ERRATA_3_3 && addr == 0)
- addr = omap_dma_chan_read(c, CSAC);
+ } else {
+ addr = omap_dma_chan_read_3_3(c, CSAC);
+ cdac = omap_dma_chan_read_3_3(c, CDAC);
- if (!__dma_omap15xx(od->plat->dma_attr)) {
/*
* CDAC == 0 indicates that the DMA transfer on the channel has
* not been started (no data has been transferred so far).
* Return the programmed source start address in this case.
*/
- if (omap_dma_chan_read(c, CDAC))
- addr = omap_dma_chan_read(c, CSAC);
- else
+ if (cdac == 0)
addr = omap_dma_chan_read(c, CSSA);
}
@@ -487,21 +498,16 @@ static dma_addr_t omap_dma_get_dst_pos(struct omap_chan *c)
struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device);
dma_addr_t addr;
- if (__dma_omap15xx(od->plat->dma_attr))
+ if (__dma_omap15xx(od->plat->dma_attr)) {
addr = omap_dma_chan_read(c, CPC);
- else
- addr = omap_dma_chan_read(c, CDAC);
+ } else {
+ addr = omap_dma_chan_read_3_3(c, CDAC);
- /*
- * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
- * read before the DMA controller finished disabling the channel.
- */
- if (!__dma_omap15xx(od->plat->dma_attr) && addr == 0) {
- addr = omap_dma_chan_read(c, CDAC);
/*
- * CDAC == 0 indicates that the DMA transfer on the channel has
- * not been started (no data has been transferred so far).
- * Return the programmed destination start address in this case.
+ * CDAC == 0 indicates that the DMA transfer on the channel
+ * has not been started (no data has been transferred so
+ * far). Return the programmed destination start address in
+ * this case.
*/
if (addr == 0)
addr = omap_dma_chan_read(c, CDSA);