diff options
| author | Taniya Das <tdas@codeaurora.org> | 2017-01-19 16:53:42 +0530 |
|---|---|---|
| committer | Taniya Das <tdas@codeaurora.org> | 2017-01-19 17:56:57 +0530 |
| commit | c381d19d0dc6b3173919280c6bdd390be809bb0d (patch) | |
| tree | a1664bc6bd015a837e7e6849b77101a602fd7de1 | |
| parent | 3145cd4109c443789594f87a3ff54d7e5b94c516 (diff) | |
clk: qcom: Move the rbcpr clock voltage vote to active only
The RBCPR client would not be able to remove it's vote during any low power
state, so move the clock to vote on active only voltage.
Change-Id: I859ad7eb5b4f604cd8785156a0354ed76d3622c0
Signed-off-by: Taniya Das <tdas@codeaurora.org>
| -rw-r--r-- | drivers/clk/qcom/gcc-sdm660.c | 2 | ||||
| -rw-r--r-- | drivers/clk/qcom/vdd-level-660.h | 10 |
2 files changed, 10 insertions, 2 deletions
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c index 076ff3565ef4..d8ae85b65a47 100644 --- a/drivers/clk/qcom/gcc-sdm660.c +++ b/drivers/clk/qcom/gcc-sdm660.c @@ -818,7 +818,7 @@ static struct clk_rcg2 hmss_rbcpr_clk_src = { .parent_names = gcc_parent_names_ao_1, .num_parents = 3, .ops = &clk_rcg2_ops, - VDD_DIG_FMAX_MAP2( + VDD_DIG_FMAX_MAP2_AO( LOWER, 19200000, NOMINAL, 50000000), }, diff --git a/drivers/clk/qcom/vdd-level-660.h b/drivers/clk/qcom/vdd-level-660.h index f98a96033ea9..53317fe6d294 100644 --- a/drivers/clk/qcom/vdd-level-660.h +++ b/drivers/clk/qcom/vdd-level-660.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -95,6 +95,14 @@ }, \ .num_rate_max = VDD_DIG_NUM +#define VDD_DIG_FMAX_MAP2_AO(l1, f1, l2, f2) \ + .vdd_class = &vdd_dig_ao, \ + .rate_max = (unsigned long[VDD_DIG_NUM]) { \ + [VDD_DIG_##l1] = (f1), \ + [VDD_DIG_##l2] = (f2), \ + }, \ + .num_rate_max = VDD_DIG_NUM + #define VDD_DIG_FMAX_MAP3_AO(l1, f1, l2, f2, l3, f3) \ .vdd_class = &vdd_dig_ao, \ .rate_max = (unsigned long[VDD_DIG_NUM]) { \ |