diff options
| author | Meng Wang <mwang@codeaurora.org> | 2016-09-12 14:53:43 +0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-09-13 00:38:09 -0700 |
| commit | c3d1fc7a13a78830ea509840316da3775239196c (patch) | |
| tree | b771e131bc6b96d194a2c18731155abd44a3762a | |
| parent | b7bf6d2b634c0806a584e25d69e7b69b1d5781d4 (diff) | |
ARM: dts: msm: add new clk for native playback on msmcobalt
MSM GPIO 69 is used as a clock for native playback
on msmcobalt. Add the GPIO 69 configuration along with
pinctrl information.
CRs-Fixed: 1066167
Change-Id: Icd3e82a754867c0f16035a5f3eb7f86ee57c7281
Signed-off-by: Meng Wang <mwang@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi | 28 |
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi index ec69d7ac895d..9b50bb96750a 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi @@ -231,6 +231,9 @@ clocks = <&clock_gcc clk_div_clk1>; qcom,node_has_rpm_clock; #clock-cells = <1>; + pinctrl-names = "sleep", "active"; + pinctrl-0 = <&spkr_i2s_clk_sleep>; + pinctrl-1 = <&spkr_i2s_clk_active>; }; clock_audio_lnbb: audio_ext_clk_lnbb { diff --git a/arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi index c0f465b0eba5..f4f47bc461fc 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi @@ -2715,5 +2715,33 @@ }; }; }; + + spkr_i2s_clk_pin { + spkr_i2s_clk_sleep: spkr_i2s_clk_sleep { + mux { + pins = "gpio69"; + function = "spkr_i2s"; + }; + + config { + pins = "gpio69"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + + spkr_i2s_clk_active: spkr_i2s_clk_active { + mux { + pins = "gpio69"; + function = "spkr_i2s"; + }; + + config { + pins = "gpio69"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; }; }; |