diff options
author | Sayali Lokhande <sayalil@codeaurora.org> | 2017-02-24 16:05:56 +0530 |
---|---|---|
committer | Sayali Lokhande <sayalil@codeaurora.org> | 2017-02-24 16:11:49 +0530 |
commit | c560c84cab24fd22b8c4ed87675db8a25f5a3797 (patch) | |
tree | a0fb0b4466f19ff4c2a56cc09d288ebd6f399de2 | |
parent | 33d9f2946f4431827a04cfc347a2b045e3025aa0 (diff) |
ARM: dts: msm: Update SDCC LPM latencies for sdm660
Updating PM QOS latencies for sdhc1 and sdhc2 to have
proper QOS voting on sdm660 target.
Change-Id: If0d1f47f38cceb825368041ee311d10c01226455
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
-rw-r--r-- | arch/arm/boot/dts/qcom/sdm660-common.dtsi | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/qcom/sdm660-common.dtsi b/arch/arm/boot/dts/qcom/sdm660-common.dtsi index 05b7973f2457..affa5d45073a 100644 --- a/arch/arm/boot/dts/qcom/sdm660-common.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-common.dtsi @@ -466,10 +466,10 @@ qcom,devfreq,freq-table = <50000000 200000000>; qcom,pm-qos-irq-type = "affine_irq"; - qcom,pm-qos-irq-latency = <26 81>; + qcom,pm-qos-irq-latency = <43 377>; qcom,pm-qos-cpu-groups = <0x0f 0xf0>; - qcom,pm-qos-cmdq-latency-us = <26 81>, <26 81>; - qcom,pm-qos-legacy-latency-us = <26 81>, <26 81>; + qcom,pm-qos-cmdq-latency-us = <43 377>, <40 325>; + qcom,pm-qos-legacy-latency-us = <43 377>, <40 325>; qcom,msm-bus,name = "sdhc1"; qcom,msm-bus,num-cases = <9>; @@ -530,9 +530,9 @@ qcom,devfreq,freq-table = <50000000 200000000>; qcom,pm-qos-irq-type = "affine_irq"; - qcom,pm-qos-irq-latency = <26 81>; + qcom,pm-qos-irq-latency = <43 377>; qcom,pm-qos-cpu-groups = <0x0f 0xf0>; - qcom,pm-qos-legacy-latency-us = <26 81>, <26 81>; + qcom,pm-qos-legacy-latency-us = <43 377>, <40 325>; clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>, <&clock_gcc GCC_SDCC2_APPS_CLK>; |