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authorH. Peter Anvin <hpa@linux.intel.com>2014-01-16 13:00:21 -0800
committerH. Peter Anvin <hpa@linux.intel.com>2014-01-16 13:00:21 -0800
commitca1e631c3acf80bc5f5934ce9054a9b4880c96e1 (patch)
treed26644eedbcde617d9e04f9f75b11c12418366f2
parent7da7c1561366ba8adb7275464ab44e84e1faa7e0 (diff)
x86, tsc, apic: Unbreak static (MSR) calibration when CONFIG_X86_LOCAL_APIC=n
If we aren't going to use the local APIC anyway, we obviously don't care about its timer frequency. Link: http://lkml.kernel.org/r/tip-rgm7xmg7k6qnjlw3ynkcjsmh@git.kernel.org Reported-by: Fengguang Wu <fengguang.wu@intel.com> Cc: Bin Gao <bin.gao@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
-rw-r--r--arch/x86/kernel/tsc_msr.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index c5027724e307..8b5434f4389f 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -118,8 +118,10 @@ int try_msr_calibrate_tsc(unsigned long *fast_calibrate)
*fast_calibrate = freq * ratio;
pr_info("TSC runs at %lu KHz\n", *fast_calibrate);
+#ifdef CONFIG_X86_LOCAL_APIC
lapic_timer_frequency = (freq * 1000) / HZ;
pr_info("lapic_timer_frequency = %d\n", lapic_timer_frequency);
+#endif
return 1;
}