ASoC: msm: Group mi2s driver support for msm8996

Support group mi2s driver for sec/tert/quat mi2s interface in
msm8996.

Change-Id: I656612ca104c80770e316bc4d541d2ae56164e61
Signed-off-by: Cong Tang <congt@codeaurora.org>

8 files changed, 4311 insertions, 8 deletions

diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h
index 48fe32252e8d..89e05abfd74b 100644
--- a/include/sound/apr_audio-v2.h
+++ b/include/sound/apr_audio-v2.h
@@ -1489,11 +1489,35 @@ struct adm_cmd_connect_afe_port_v5 {
 #define AFE_PORT_ID_PRIMARY_MI2S_RX         0x1000
 #define AFE_PORT_ID_PRIMARY_MI2S_TX         0x1001
 #define AFE_PORT_ID_SECONDARY_MI2S_RX       0x1002
+#define AFE_PORT_ID_SECONDARY_MI2S_RX_1     0x1040
+#define AFE_PORT_ID_SECONDARY_MI2S_RX_2     0x1042
+#define AFE_PORT_ID_SECONDARY_MI2S_RX_3     0x1044
+#define AFE_PORT_ID_SECONDARY_MI2S_RX_4     0x1046
 #define AFE_PORT_ID_SECONDARY_MI2S_TX       0x1003
+#define AFE_PORT_ID_SECONDARY_MI2S_TX_1     0x1041
+#define AFE_PORT_ID_SECONDARY_MI2S_TX_2     0x1043
+#define AFE_PORT_ID_SECONDARY_MI2S_TX_3     0x1045
+#define AFE_PORT_ID_SECONDARY_MI2S_TX_4     0x1047
 #define AFE_PORT_ID_TERTIARY_MI2S_RX        0x1004
+#define AFE_PORT_ID_TERTIARY_MI2S_RX_1      0x1048
+#define AFE_PORT_ID_TERTIARY_MI2S_RX_2      0x104A
+#define AFE_PORT_ID_TERTIARY_MI2S_RX_3      0x104C
+#define AFE_PORT_ID_TERTIARY_MI2S_RX_4      0x104E
 #define AFE_PORT_ID_TERTIARY_MI2S_TX        0x1005
+#define AFE_PORT_ID_TERTIARY_MI2S_TX_1      0x1049
+#define AFE_PORT_ID_TERTIARY_MI2S_TX_2      0x104B
+#define AFE_PORT_ID_TERTIARY_MI2S_TX_3      0x104D
+#define AFE_PORT_ID_TERTIARY_MI2S_TX_4      0x104F
 #define AFE_PORT_ID_QUATERNARY_MI2S_RX      0x1006
+#define AFE_PORT_ID_QUATERNARY_MI2S_RX_1    0x1020
+#define AFE_PORT_ID_QUATERNARY_MI2S_RX_2    0x1022
+#define AFE_PORT_ID_QUATERNARY_MI2S_RX_3    0x1024
+#define AFE_PORT_ID_QUATERNARY_MI2S_RX_4    0x1026
 #define AFE_PORT_ID_QUATERNARY_MI2S_TX      0x1007
+#define AFE_PORT_ID_QUATERNARY_MI2S_TX_1    0x1021
+#define AFE_PORT_ID_QUATERNARY_MI2S_TX_2    0x1023
+#define AFE_PORT_ID_QUATERNARY_MI2S_TX_3    0x1025
+#define AFE_PORT_ID_QUATERNARY_MI2S_TX_4    0x1027
 #define AUDIO_PORT_ID_I2S_RX                0x1008
 #define AFE_PORT_ID_DIGITAL_MIC_TX          0x1009
 #define AFE_PORT_ID_PRIMARY_PCM_RX          0x100A
@@ -10886,6 +10910,7 @@ struct afe_port_cmd_set_aanc_acdb_table {
 #define AFE_PARAM_ID_GROUP_DEVICE_CFG	0x00010255
 #define AFE_PARAM_ID_GROUP_DEVICE_ENABLE 0x00010256
 #define AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX	0x1102
+#define AFE_PARAM_ID_GROUP_DEVICE_I2S_CONFIG	0x00010286
 
 /*  Payload of the #AFE_PARAM_ID_GROUP_DEVICE_CFG
  * parameter, which configures max of 8 AFE ports
@@ -11069,6 +11094,119 @@ struct afe_param_id_group_device_tdm_cfg {
 	@values 1 to 2^32 -1 */
 } __packed;
 
+#define AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX \
+	(AFE_PORT_ID_SECONDARY_MI2S_TX + 0x100)
+#define AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX \
+	(AFE_PORT_ID_TERTIARY_MI2S_RX + 0x100)
+#define AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX \
+	(AFE_PORT_ID_TERTIARY_MI2S_TX + 0x100)
+#define AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX \
+	(AFE_PORT_ID_QUATERNARY_MI2S_RX + 0x100)
+#define AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_TX \
+	(AFE_PORT_ID_QUATERNARY_MI2S_TX + 0x100)
+
+#define AFE_API_VERSION_GROUP_DEVICE_I2S_CONFIG 0x1
+
+/* Payload of the AFE_PARAM_ID_GROUP_DEVICE_I2S_CONFIG parameter ID
+*  used by AFE_MODULE_GROUP_DEVICE.
+*/
+struct afe_param_id_group_device_i2s_cfg_v1 {
+	u32 minor_version;
+	/**< Minor version used to track group device configuration.
+	* @values #AFE_API_VERSION_GROUP_DEVICE_I2S_CONFIG
+	*/
+
+	u16 group_id;
+	/**< ID for the group device.
+	* @values
+	* - #AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX
+	* - #AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX
+	* - #AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX
+	* - #AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX
+	* - #AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX
+	* - #AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX
+	*/
+
+	u16 channel_mode;
+	/**< Group line channel mode
+	* @values
+	* - #AFE_PORT_I2S_SD0
+	* - #AFE_PORT_I2S_SD1
+	* - #AFE_PORT_I2S_SD2
+	* - #AFE_PORT_I2S_SD3
+	* - #AFE_PORT_I2S_QUAD01
+	* - #AFE_PORT_I2S_QUAD23
+	* - #AFE_PORT_I2S_6CHS
+	* - #AFE_PORT_I2S_8CHS
+	*/
+
+	u32 sample_rate;
+	/**< Sampling rate of the port.
+	* @values
+	* - #AFE_PORT_SAMPLE_RATE_8K
+	* - #AFE_PORT_SAMPLE_RATE_16K
+	* - #AFE_PORT_SAMPLE_RATE_24K
+	* - #AFE_PORT_SAMPLE_RATE_32K
+	*/
+
+	u16 port_id[AFE_GROUP_DEVICE_NUM_PORTS];
+	/**< Array of member port IDs of this group.
+	* @values
+	* - #AFE_PORT_ID_SECONDARY_MI2S_RX_1
+	* - #AFE_PORT_ID_SECONDARY_MI2S_RX_2
+	* - #AFE_PORT_ID_SECONDARY_MI2S_RX_3
+	* - #AFE_PORT_ID_SECONDARY_MI2S_RX_4
+
+	* - #AFE_PORT_ID_SECONDARY_MI2S_TX_1
+	* - #AFE_PORT_ID_SECONDARY_MI2S_TX_2
+	* - #AFE_PORT_ID_SECONDARY_MI2S_TX_3
+	* - #AFE_PORT_ID_SECONDARY_MI2S_TX_4
+
+	* - #AFE_PORT_ID_TERTIARY_MI2S_RX_1
+	* - #AFE_PORT_ID_TERTIARY_MI2S_RX_2
+	* - #AFE_PORT_ID_TERTIARY_MI2S_RX_3
+	* - #AFE_PORT_ID_TERTIARY_MI2S_RX_4
+
+	* - #AFE_PORT_ID_TERTIARY_MI2S_TX_1
+	* - #AFE_PORT_ID_TERTIARY_MI2S_TX_2
+	* - #AFE_PORT_ID_TERTIARY_MI2S_TX_3
+	* - #AFE_PORT_ID_TERTIARY_MI2S_TX_4
+
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_RX_1
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_RX_2
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_RX_3
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_RX_4
+
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_TX_1
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_TX_2
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_TX_3
+	* - #AFE_PORT_ID_QUATERNARY_MI2S_TX_4
+	* @tablebulletend
+	*/
+
+	u16 bit_width;
+	/**< Bit width of the sample.
+	* @values 16, 24, (32)
+	*/
+
+	u16 reserved;
+} __packed;
+
+struct afe_param_id_group_device_enable {
+	u16 group_id;
+	u16 enable;
+} __packed;
+
+union afe_port_group_mi2s_config {
+	struct afe_param_id_group_device_i2s_cfg_v1 i2s_cfg;
+	struct afe_param_id_group_device_enable group_enable;
+} __packed;
+
+struct afe_i2s_port_config {
+	struct afe_param_id_i2s_cfg i2s_cfg;
+	struct afe_param_id_slot_mapping_cfg slot_mapping;
+} __packed;
+
 /*  Payload of the #AFE_PARAM_ID_GROUP_DEVICE_ENABLE
  * parameter, which enables or
  * disables any module.
diff --git a/include/sound/q6afe-v2.h b/include/sound/q6afe-v2.h
index cdbf97023f66..a6d697d6a8f8 100644
--- a/include/sound/q6afe-v2.h
+++ b/include/sound/q6afe-v2.h
@@ -208,6 +208,33 @@ enum {
 	IDX_AFE_PORT_ID_INT5_MI2S_TX,
 	IDX_AFE_PORT_ID_INT6_MI2S_RX,
 	IDX_AFE_PORT_ID_INT6_MI2S_TX,
+	/* IDX 143 -> 150 */
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_1,
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_2,
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_3,
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_4,
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_1,
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_2,
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_3,
+	IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_4,
+	/* IDX 151 -> 158 */
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_1,
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_2,
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_3,
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_4,
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_1,
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_2,
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_3,
+	IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_4,
+	/* IDX 159 -> 166 */
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_1,
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_2,
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_3,
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_4,
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_1,
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_2,
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_3,
+	IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_4,
 	AFE_MAX_PORTS
 };
 
@@ -292,6 +319,44 @@ enum {
 	IDX_GROUP_TDM_MAX,
 };
 
+enum {
+	IDX_SECONDARY_MI2S_RX_1,
+	IDX_SECONDARY_MI2S_RX_2,
+	IDX_SECONDARY_MI2S_RX_3,
+	IDX_SECONDARY_MI2S_RX_4,
+	IDX_SECONDARY_MI2S_TX_1,
+	IDX_SECONDARY_MI2S_TX_2,
+	IDX_SECONDARY_MI2S_TX_3,
+	IDX_SECONDARY_MI2S_TX_4,
+	IDX_TERTIARY_MI2S_RX_1,
+	IDX_TERTIARY_MI2S_RX_2,
+	IDX_TERTIARY_MI2S_RX_3,
+	IDX_TERTIARY_MI2S_RX_4,
+	IDX_TERTIARY_MI2S_TX_1,
+	IDX_TERTIARY_MI2S_TX_2,
+	IDX_TERTIARY_MI2S_TX_3,
+	IDX_TERTIARY_MI2S_TX_4,
+	IDX_QUATERNARY_MI2S_RX_1,
+	IDX_QUATERNARY_MI2S_RX_2,
+	IDX_QUATERNARY_MI2S_RX_3,
+	IDX_QUATERNARY_MI2S_RX_4,
+	IDX_QUATERNARY_MI2S_TX_1,
+	IDX_QUATERNARY_MI2S_TX_2,
+	IDX_QUATERNARY_MI2S_TX_3,
+	IDX_QUATERNARY_MI2S_TX_4,
+	IDX_GROUP_MI2S_PORT_MAX,
+};
+
+enum {
+	IDX_GROUP_SECONDARY_MI2S_RX,
+	IDX_GROUP_SECONDARY_MI2S_TX,
+	IDX_GROUP_TERTIARY_MI2S_RX,
+	IDX_GROUP_TERTIARY_MI2S_TX,
+	IDX_GROUP_QUATERNARY_MI2S_RX,
+	IDX_GROUP_QUATERNARY_MI2S_TX,
+	IDX_GROUP_MI2S_MAX,
+};
+
 enum afe_mad_type {
 	MAD_HW_NONE = 0x00,
 	MAD_HW_AUDIO = 0x01,
@@ -458,4 +523,9 @@ int afe_request_dma_resources(uint8_t dma_type, uint8_t num_read_dma_channels,
 int afe_get_dma_idx(bool **ret_rddma_idx,
 				bool **ret_wrdma_idx);
 int afe_release_all_dma_resources(void);
+int afe_i2s_port_start(u16 port_id, struct afe_i2s_port_config *i2s_port,
+		u32 rate, u16 num_groups);
+int afe_port_group_mi2s_enable(u16 group_id,
+		union afe_port_group_mi2s_config *afe_group_config,
+		u16 enable);
 #endif /* __Q6AFE_V2_H__ */
diff --git a/sound/soc/msm/apq8096-auto.c b/sound/soc/msm/apq8096-auto.c
index e5d99f5fd7d1..69a1fbfa45aa 100644
--- a/sound/soc/msm/apq8096-auto.c
+++ b/sound/soc/msm/apq8096-auto.c
@@ -160,6 +160,42 @@ static int msm_tert_tdm_slot_num = 8;
 static int msm_quat_tdm_slot_width = 32;
 static int msm_quat_tdm_slot_num = 8;
 
+/* Group_MI2S default port channels */
+static int msm_sec_group_mi2s_rx_1_ch = 2;
+static int msm_sec_group_mi2s_rx_2_ch = 2;
+static int msm_sec_group_mi2s_rx_3_ch = 2;
+static int msm_sec_group_mi2s_rx_4_ch = 2;
+static int msm_sec_group_mi2s_tx_1_ch = 2;
+static int msm_sec_group_mi2s_tx_2_ch = 2;
+static int msm_sec_group_mi2s_tx_3_ch = 2;
+static int msm_sec_group_mi2s_tx_4_ch = 2;
+static int msm_tert_group_mi2s_rx_1_ch = 2;
+static int msm_tert_group_mi2s_rx_2_ch = 2;
+static int msm_tert_group_mi2s_rx_3_ch = 2;
+static int msm_tert_group_mi2s_rx_4_ch = 2;
+static int msm_tert_group_mi2s_tx_1_ch = 2;
+static int msm_tert_group_mi2s_tx_2_ch = 2;
+static int msm_tert_group_mi2s_tx_3_ch = 2;
+static int msm_tert_group_mi2s_tx_4_ch = 2;
+static int msm_quat_group_mi2s_rx_1_ch = 2;
+static int msm_quat_group_mi2s_rx_2_ch = 2;
+static int msm_quat_group_mi2s_rx_3_ch = 2;
+static int msm_quat_group_mi2s_rx_4_ch = 2;
+static int msm_quat_group_mi2s_tx_1_ch = 2;
+static int msm_quat_group_mi2s_tx_2_ch = 2;
+static int msm_quat_group_mi2s_tx_3_ch = 2;
+static int msm_quat_group_mi2s_tx_4_ch = 2;
+
+/* Group MI2S default sample rate*/
+static int msm_sec_group_mi2s_rate = SAMPLING_RATE_48KHZ;
+static int msm_tert_group_mi2s_rate = SAMPLING_RATE_48KHZ;
+static int msm_quat_group_mi2s_rate = SAMPLING_RATE_48KHZ;
+
+/* Group MI2S slot width bit format */
+static int msm_sec_group_mi2s_bit_format = SNDRV_PCM_FORMAT_S24_LE;
+static int msm_tert_group_mi2s_bit_format = SNDRV_PCM_FORMAT_S24_LE;
+static int msm_quat_group_mi2s_bit_format = SNDRV_PCM_FORMAT_S24_LE;
+
 /* EC Reference default values are set in mixer_paths.xml */
 static int msm_ec_ref_ch = 4;
 static int msm_ec_ref_bit_format = SNDRV_PCM_FORMAT_S16_LE;
@@ -172,6 +208,41 @@ static void *adsp_state_notifier;
 static bool dummy_device_registered;
 static struct snd_soc_card  *sndcard;
 
+#define GROUP_MI2S_SLOT_OFFSET_MAX 8
+static unsigned int group_mi2s_slot_offset
+	[IDX_GROUP_MI2S_PORT_MAX][GROUP_MI2S_SLOT_OFFSET_MAX] = {
+	/* GROUP_SEC_MI2S_RX */
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0xFFFF},
+	{0xFFFF},
+	/* GROUP_SEC_MI2S_TX */
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0xFFFF},
+	{0xFFFF},
+	/* GROUP_TERT_MI2S_RX */
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0xFFFF},
+	{0xFFFF},
+	/* GROUP_TERT_MI2S_TX */
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0xFFFF},
+	{0xFFFF},
+	/* GROUP_QUAT_MI2S_RX */
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	/* GROUP_QUAT_MI2S_TX */
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+	{0, 4, 0xFFFF},
+};
+
 enum {
 	QUATERNARY_TDM_RX_0,
 	QUATERNARY_TDM_RX_1,
@@ -3307,6 +3378,173 @@ static int msm_mi2s_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
 	return 0;
 }
 
+static int msm_group_mi2s_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+			struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+	struct snd_interval *rate =
+			hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
+	struct snd_interval *channels =
+			hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
+
+	switch (cpu_dai->id) {
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+		channels->min = channels->max = msm_sec_group_mi2s_rx_1_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+		channels->min = channels->max = msm_sec_group_mi2s_rx_2_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+		channels->min = channels->max = msm_sec_group_mi2s_rx_3_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+		channels->min = channels->max = msm_sec_group_mi2s_rx_4_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+		channels->min = channels->max = msm_sec_group_mi2s_tx_1_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+		channels->min = channels->max = msm_sec_group_mi2s_tx_2_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+		channels->min = channels->max = msm_sec_group_mi2s_tx_3_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+		channels->min = channels->max = msm_sec_group_mi2s_tx_4_ch;
+		rate->min = rate->max = msm_sec_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_sec_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+		channels->min = channels->max = msm_tert_group_mi2s_rx_1_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+		channels->min = channels->max = msm_tert_group_mi2s_rx_2_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+		channels->min = channels->max = msm_tert_group_mi2s_rx_3_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+		channels->min = channels->max = msm_tert_group_mi2s_rx_4_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+		channels->min = channels->max = msm_tert_group_mi2s_tx_1_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+		channels->min = channels->max = msm_tert_group_mi2s_tx_2_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+		channels->min = channels->max = msm_tert_group_mi2s_tx_3_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+		channels->min = channels->max = msm_tert_group_mi2s_tx_4_ch;
+		rate->min = rate->max = msm_tert_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_tert_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+		channels->min = channels->max = msm_quat_group_mi2s_rx_1_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+		channels->min = channels->max = msm_quat_group_mi2s_rx_2_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+		channels->min = channels->max = msm_quat_group_mi2s_rx_3_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+		channels->min = channels->max = msm_quat_group_mi2s_rx_4_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+		channels->min = channels->max = msm_quat_group_mi2s_tx_1_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+		channels->min = channels->max = msm_quat_group_mi2s_tx_2_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+		channels->min = channels->max = msm_quat_group_mi2s_tx_3_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+		channels->min = channels->max = msm_quat_group_mi2s_tx_4_ch;
+		rate->min = rate->max = msm_quat_group_mi2s_rate;
+		param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+			msm_quat_group_mi2s_bit_format);
+		break;
+	default:
+		pr_err("%s: dai id 0x%x not supported\n",
+			__func__, cpu_dai->id);
+		return -EINVAL;
+	}
+
+	pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
+		__func__, cpu_dai->id, channels->max, rate->max,
+		params_format(params));
+
+	return 0;
+}
+
 static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
 				  struct snd_pcm_hw_params *params)
 {
@@ -4085,6 +4323,142 @@ static struct snd_soc_ops apq8096_tdm_be_ops = {
 	.hw_params = apq8096_tdm_snd_hw_params,
 };
 
+static int apq8096_group_mi2s_snd_hw_params(struct snd_pcm_substream *substream,
+			struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+	int ret = 0;
+	int channels, rate;
+	unsigned int *slot_offset;
+	int offset_channels = 0;
+	int i;
+
+	rate = params_rate(params);
+	channels = params_channels(params);
+
+	switch (cpu_dai->id) {
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_RX_1];
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_RX_2];
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_RX_3];
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_RX_4];
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_TX_1];
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_TX_2];
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_TX_3];
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+		slot_offset = group_mi2s_slot_offset[IDX_SECONDARY_MI2S_TX_4];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_RX_1];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_RX_2];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_RX_3];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_RX_4];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_TX_1];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_TX_2];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_TX_3];
+		break;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+		slot_offset = group_mi2s_slot_offset[IDX_TERTIARY_MI2S_TX_4];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_RX_1];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_RX_2];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_RX_3];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_RX_4];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_TX_1];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_TX_2];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_TX_3];
+		break;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+		slot_offset = group_mi2s_slot_offset[IDX_QUATERNARY_MI2S_TX_4];
+		break;
+	default:
+		pr_err("%s: dai id 0x%x not supported\n",
+				__func__, cpu_dai->id);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < GROUP_MI2S_SLOT_OFFSET_MAX; i++) {
+		if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)
+			offset_channels++;
+	}
+
+	if (offset_channels == 0) {
+		pr_err("%s: slot offset not supported, offset_channels %d\n",
+			__func__, offset_channels);
+		return -EINVAL;
+	}
+
+	if (channels > offset_channels) {
+		pr_err("%s: channels %d and offset_channels %d not match\n",
+			__func__, channels, offset_channels);
+		return -EINVAL;
+	}
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+		ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
+				channels, slot_offset);
+		if (ret < 0) {
+			pr_err("%s: failed to set channel map, err:%d\n",
+			__func__, ret);
+			goto end;
+		}
+	} else {
+		ret = snd_soc_dai_set_channel_map(cpu_dai,
+				channels, slot_offset,
+				0, NULL);
+		if (ret < 0) {
+			pr_err("%s: failed to set channel map, err:%d\n",
+			__func__, ret);
+			goto end;
+		}
+	}
+end:
+	return ret;
+}
+
+static struct snd_soc_ops apq8096_group_mi2s_be_ops = {
+	.hw_params = apq8096_group_mi2s_snd_hw_params,
+};
+
 static const struct soc_enum msm_snd_enum[] = {
 	SOC_ENUM_SINGLE_EXT(2, auxpcm_rate_text),
 	SOC_ENUM_SINGLE_EXT(7, hdmi_rx_ch_text),
@@ -6546,6 +6920,342 @@ static struct snd_soc_dai_link apq8096_auto_be_dai_links[] = {
 		.be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
 		.ops = &apq8096_tdm_be_ops,
 		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_TX_1,
+		.stream_name = "Secondary MI2S1 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4161",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_TX_2,
+		.stream_name = "Secondary MI2S2 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4163",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_TX_3,
+		.stream_name = "Secondary MI2S3 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4165",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_TX_4,
+		.stream_name = "Secondary MI2S4 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4167",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_TX_1,
+		.stream_name = "Tertiary MI2S1 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4169",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_TX_2,
+		.stream_name = "Tertiary MI2S2 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4171",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_TX_3,
+		.stream_name = "Tertiary MI2S3 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4173",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_TX_4,
+		.stream_name = "Tertiary MI2S4 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4175",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_TX_1,
+		.stream_name = "Quaternary MI2S1 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4129",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_TX_2,
+		.stream_name = "Quaternary MI2S2 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4131",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_TX_3,
+		.stream_name = "Quaternary MI2S3 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4133",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_TX_4,
+		.stream_name = "Quaternary MI2S4 Capture",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4135",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-tx",
+		.no_pcm = 1,
+		.dpcm_capture = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_RX_1,
+		.stream_name = "Secondary MI2S1 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4160",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_RX_2,
+		.stream_name = "Secondary MI2S2 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4162",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_RX_3,
+		.stream_name = "Secondary MI2S3 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4164",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_SEC_MI2S_RX_4,
+		.stream_name = "Secondary MI2S4 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4166",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_RX_1,
+		.stream_name = "Tertiary MI2S1 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4168",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_RX_2,
+		.stream_name = "Tertiary MI2S2 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4170",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_RX_3,
+		.stream_name = "Tertiary MI2S3 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4172",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_TERT_MI2S_RX_4,
+		.stream_name = "Tertiary MI2S4 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4174",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_RX_1,
+		.stream_name = "Quaternary MI2S1 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4128",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_RX_2,
+		.stream_name = "Quaternary MI2S2 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4130",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_RX_3,
+		.stream_name = "Quaternary MI2S3 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4132",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
+	},
+	{
+		.name = LPASS_BE_QUAT_MI2S_RX_4,
+		.stream_name = "Quaternary MI2S4 Playback",
+		.cpu_dai_name = "msm-dai-q6-mi2s.4134",
+		.platform_name = "msm-pcm-routing",
+		.codec_name = "msm-stub-codec.1",
+		.codec_dai_name = "msm-stub-rx",
+		.no_pcm = 1,
+		.dpcm_playback = 1,
+		.be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+		.be_hw_params_fixup = msm_group_mi2s_be_hw_params_fixup,
+		.ops = &apq8096_group_mi2s_be_ops,
+		.ignore_suspend = 1,
 	}
 };
 
diff --git a/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c
index b09f6a1378f0..0c23e1eef483 100644
--- a/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c
@@ -124,6 +124,47 @@ struct msm_dai_q6_mi2s_dai_data {
 	struct msm_dai_q6_mi2s_dai_config rx_dai;
 };
 
+static DEFINE_MUTEX(group_mi2s_mutex);
+static atomic_t group_mi2s_ref[IDX_GROUP_MI2S_MAX];
+
+/* cache of mi2s group cfg per parent node */
+static struct afe_param_id_group_device_i2s_cfg_v1 group_mi2s_cfg = {
+	AFE_API_VERSION_GROUP_DEVICE_I2S_CONFIG,
+	AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX,
+	AFE_PORT_I2S_QUAD01,
+	48000,
+	{
+	AFE_PORT_ID_INVALID,
+	AFE_PORT_ID_TERTIARY_MI2S_TX_1,
+	AFE_PORT_ID_TERTIARY_MI2S_TX_2,
+	AFE_PORT_ID_INVALID,
+	AFE_PORT_ID_INVALID,
+	AFE_PORT_ID_INVALID,
+	AFE_PORT_ID_INVALID,
+	AFE_PORT_ID_INVALID
+	},
+	32,
+	0,
+};
+
+static struct afe_clk_set group_mi2s_bclk_set = {
+	AFE_API_VERSION_CLOCK_SET,
+	Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
+	Q6AFE_LPASS_IBIT_CLK_3_P072_MHZ,
+	Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
+	Q6AFE_LPASS_CLK_ROOT_DEFAULT,
+	0,
+};
+
+static struct afe_clk_set group_mi2s_mclk_set = {
+	AFE_API_VERSION_CLOCK_SET,
+	Q6AFE_LPASS_CLK_ID_MCLK_2,
+	Q6AFE_LPASS_OSR_CLK_3_P072_MHZ,
+	Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
+	Q6AFE_LPASS_CLK_ROOT_DEFAULT,
+	0,
+};
+
 struct msm_dai_q6_auxpcm_dai_data {
 	/* BITMAP to track Rx and Tx port usage count */
 	DECLARE_BITMAP(auxpcm_port_status, STATUS_MAX);
@@ -147,6 +188,19 @@ struct msm_dai_q6_tdm_dai_data {
 	struct afe_tdm_port_config port_cfg; /* hold tdm config */
 };
 
+struct msm_dai_q6_group_mi2s_dai_data {
+	DECLARE_BITMAP(status_mask, STATUS_MAX);
+	u32 rate;
+	u32 channels;
+	u32 bit_width;
+	u32 num_group_ports;
+	u32 sync_mode;
+	struct afe_clk_set bclk_set;
+	struct afe_clk_set mclk_set;
+	union afe_port_group_mi2s_config group_cfg;
+	struct afe_i2s_port_config port_cfg;
+};
+
 /* MI2S format field for AFE_PORT_CMD_I2S_CONFIG command
  *  0: linear PCM
  *  1: non-linear PCM
@@ -455,6 +509,104 @@ int msm_dai_q6_get_port_idx(u16 id)
 	}
 }
 
+static int msm_dai_q6_get_mi2s_group_idx(u16 id)
+{
+	switch (id) {
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+		return IDX_GROUP_SECONDARY_MI2S_RX;
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+		return IDX_GROUP_SECONDARY_MI2S_TX;
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+		return IDX_GROUP_TERTIARY_MI2S_RX;
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+		return IDX_GROUP_TERTIARY_MI2S_TX;
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+		return IDX_GROUP_QUATERNARY_MI2S_RX;
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_TX:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+		return IDX_GROUP_QUATERNARY_MI2S_TX;
+	default: return -EINVAL;
+	}
+}
+
+static int msm_dai_q6_get_mi2s_port_idx(u16 id)
+{
+	switch (id) {
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+	    return IDX_SECONDARY_MI2S_RX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+	    return IDX_SECONDARY_MI2S_RX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+	    return IDX_SECONDARY_MI2S_RX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+	    return IDX_SECONDARY_MI2S_RX_4;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+	    return IDX_SECONDARY_MI2S_TX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+	    return IDX_SECONDARY_MI2S_TX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+	    return IDX_SECONDARY_MI2S_TX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+	    return IDX_SECONDARY_MI2S_TX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+	    return IDX_TERTIARY_MI2S_RX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+	    return IDX_TERTIARY_MI2S_RX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+	    return IDX_TERTIARY_MI2S_RX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+	    return IDX_TERTIARY_MI2S_RX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+	    return IDX_TERTIARY_MI2S_TX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+	    return IDX_TERTIARY_MI2S_TX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+	    return IDX_TERTIARY_MI2S_TX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+	    return IDX_TERTIARY_MI2S_TX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+	    return IDX_QUATERNARY_MI2S_RX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+	    return IDX_QUATERNARY_MI2S_RX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+	    return IDX_QUATERNARY_MI2S_RX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+	    return IDX_QUATERNARY_MI2S_RX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+	    return IDX_QUATERNARY_MI2S_TX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+	    return IDX_QUATERNARY_MI2S_TX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+	    return IDX_QUATERNARY_MI2S_TX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+	    return IDX_QUATERNARY_MI2S_TX_4;
+	default: return -EINVAL;
+	}
+}
+
 static u16 msm_dai_q6_max_num_slot(int frame_rate)
 {
 	/* Max num of slots is bits per frame divided
@@ -531,7 +683,7 @@ static int msm_dai_q6_auxpcm_hw_params(
 	int rc = 0, slot_mapping_copy_len = 0;
 
 	if (params_channels(params) != 1 || (params_rate(params) != 8000 &&
-	    params_rate(params) != 16000)) {
+		params_rate(params) != 16000)) {
 		dev_err(dai->dev, "%s: invalid param chan %d rate %d\n",
 			__func__, params_channels(params), params_rate(params));
 		return -EINVAL;
@@ -540,7 +692,7 @@ static int msm_dai_q6_auxpcm_hw_params(
 	mutex_lock(&aux_dai_data->rlock);
 
 	if (test_bit(STATUS_TX_PORT, aux_dai_data->auxpcm_port_status) ||
-	    test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status)) {
+		test_bit(STATUS_RX_PORT, aux_dai_data->auxpcm_port_status)) {
 		/* AUXPCM DAI in use */
 		if (dai_data->rate != params_rate(params)) {
 			dev_err(dai->dev, "%s: rate mismatch of running DAI\n",
@@ -569,7 +721,7 @@ static int msm_dai_q6_auxpcm_hw_params(
 		dai_data->port_config.pcm.num_channels = dai_data->channels;
 		dai_data->port_config.pcm.bit_width = 16;
 		if (ARRAY_SIZE(dai_data->port_config.pcm.slot_number_mapping) <=
-		    auxpcm_pdata->mode_8k.num_slots)
+			auxpcm_pdata->mode_8k.num_slots)
 			slot_mapping_copy_len =
 				ARRAY_SIZE(
 				dai_data->port_config.pcm.slot_number_mapping)
@@ -580,8 +732,8 @@ static int msm_dai_q6_auxpcm_hw_params(
 
 		if (auxpcm_pdata->mode_8k.slot_mapping) {
 			memcpy(dai_data->port_config.pcm.slot_number_mapping,
-			       auxpcm_pdata->mode_8k.slot_mapping,
-			       slot_mapping_copy_len);
+				   auxpcm_pdata->mode_8k.slot_mapping,
+				   slot_mapping_copy_len);
 		} else {
 			dev_err(dai->dev, "%s 8khz slot mapping is NULL\n",
 				__func__);
@@ -605,7 +757,7 @@ static int msm_dai_q6_auxpcm_hw_params(
 		dai_data->port_config.pcm.num_channels = dai_data->channels;
 		dai_data->port_config.pcm.bit_width = 16;
 		if (ARRAY_SIZE(dai_data->port_config.pcm.slot_number_mapping) <=
-		    auxpcm_pdata->mode_16k.num_slots)
+			auxpcm_pdata->mode_16k.num_slots)
 			slot_mapping_copy_len =
 				ARRAY_SIZE(
 				dai_data->port_config.pcm.slot_number_mapping)
@@ -616,8 +768,8 @@ static int msm_dai_q6_auxpcm_hw_params(
 
 		if (auxpcm_pdata->mode_16k.slot_mapping) {
 			memcpy(dai_data->port_config.pcm.slot_number_mapping,
-			       auxpcm_pdata->mode_16k.slot_mapping,
-			       slot_mapping_copy_len);
+				   auxpcm_pdata->mode_16k.slot_mapping,
+				   slot_mapping_copy_len);
 		} else {
 			dev_err(dai->dev, "%s 16khz slot mapping is NULL\n",
 				__func__);
@@ -4322,6 +4474,908 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
 	},
 };
 
+static int msm_dai_q6_group_mi2s_set_clk_param(u32 group_id,
+			struct afe_clk_set *mclk_set,
+			struct afe_clk_set *bclk_set,
+			u32 sync_mode)
+{
+	switch (group_id) {
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX:
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX:
+		if (sync_mode)
+			bclk_set->clk_id = Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT;
+		else
+			bclk_set->clk_id = Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT;
+		mclk_set->clk_id = Q6AFE_LPASS_CLK_ID_MCLK_1;
+		break;
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX:
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX:
+		if (sync_mode)
+			bclk_set->clk_id = Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT;
+		else
+			bclk_set->clk_id = Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT;
+		mclk_set->clk_id = Q6AFE_LPASS_CLK_ID_MCLK_2;
+		break;
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX:
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_TX:
+		if (sync_mode)
+			bclk_set->clk_id = Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT;
+		else
+			bclk_set->clk_id = Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT;
+		mclk_set->clk_id = Q6AFE_LPASS_CLK_ID_MCLK_3;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int msm_dai_q6_group_mi2s_set_clk(
+		struct msm_dai_q6_group_mi2s_dai_data *dai_data,
+		u16 port_id, bool enable)
+{
+	int rc = 0;
+
+	dai_data->bclk_set.enable = enable;
+	rc = afe_set_lpass_clock_v2(port_id,
+			&dai_data->bclk_set);
+	if (rc < 0)
+		pr_err("%s: afe lpass bclk failed, err: %d\n",
+		__func__, rc);
+
+	/*non zero mclk freq value means to enable mclk for mi2s intf*/
+	if (dai_data->mclk_set.clk_freq_in_hz != 0) {
+		dai_data->mclk_set.enable = enable;
+		rc = afe_set_lpass_clock_v2(port_id,
+				&dai_data->mclk_set);
+		if (rc < 0)
+			pr_err("%s: afe lpass mclk failed, err: %d\n",
+			__func__, rc);
+	}
+	return rc;
+}
+
+static int msm_dai_q6_dai_group_mi2s_probe(struct snd_soc_dai *dai)
+{
+	int rc = 0;
+
+	msm_dai_q6_set_dai_id(dai);
+	rc = msm_dai_q6_dai_add_route(dai);
+	return rc;
+}
+
+static int msm_dai_q6_dai_group_mi2s_remove(struct snd_soc_dai *dai)
+{
+	int rc = 0;
+	struct msm_dai_q6_group_mi2s_dai_data *dai_data =
+		dev_get_drvdata(dai->dev);
+	u16 group_id = dai_data->group_cfg.i2s_cfg.group_id;
+	int group_idx = 0;
+	atomic_t *group_ref = NULL;
+
+	dev_dbg(dai->dev, "%s rc %d", __func__, rc);
+
+	group_idx = msm_dai_q6_get_mi2s_group_idx(dai->id);
+	if (group_idx < 0 || group_idx > IDX_GROUP_MI2S_MAX) {
+		dev_err(dai->dev, "%s: port id 0x%x not supported\n",
+			__func__, dai->id);
+		return -EINVAL;
+	}
+
+	group_ref = &group_mi2s_ref[group_idx];
+
+	/* if AFE port is still up, close it */
+	if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
+		rc = afe_close(dai->id); /* can block */
+		if (IS_ERR_VALUE(rc)) {
+			dev_err(dai->dev, "%s: fail to close Group MI2S port 0x%x\n",
+				 __func__, dai->id);
+		}
+		atomic_dec(group_ref);
+		clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
+
+		if (atomic_read(group_ref) == 0) {
+			rc = afe_port_group_mi2s_enable(group_id, NULL, false);
+			if (IS_ERR_VALUE(rc)) {
+				dev_err(dai->dev, "%s: fail to disable Group MI2S group 0x%x\n",
+				__func__, group_id);
+			}
+			rc = msm_dai_q6_group_mi2s_set_clk(dai_data,
+				dai->id, false);
+			if (IS_ERR_VALUE(rc)) {
+				dev_err(dai->dev, "%s: fail to disable AFE clk 0x%x\n",
+				__func__, dai->id);
+			}
+		}
+	 }
+	return 0;
+}
+
+static int msm_dai_q6_group_mi2s_set_channel_map(struct snd_soc_dai *dai,
+			unsigned int tx_num, unsigned int *tx_slot,
+			unsigned int rx_num, unsigned int *rx_slot)
+{
+	int rc = 0;
+	struct msm_dai_q6_group_mi2s_dai_data *dai_data =
+			dev_get_drvdata(dai->dev);
+	int i = 0;
+
+	switch (dai->id) {
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+		if (!rx_slot) {
+			dev_err(dai->dev, "%s: rx slot not found\n",
+			 __func__);
+			return -EINVAL;
+		}
+		for (i = 0; i < rx_num; i++)
+			dai_data->port_cfg.slot_mapping.offset[i] = rx_slot[i];
+		for (i = rx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
+			dai_data->port_cfg.slot_mapping.offset[i] =
+				AFE_SLOT_MAPPING_OFFSET_INVALID;
+		dai_data->port_cfg.slot_mapping.num_channel = rx_num;
+		break;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+	if (!tx_slot) {
+		dev_err(dai->dev, "%s: tx slot not found\n",
+		__func__);
+		return -EINVAL;
+	}
+	for (i = 0; i < tx_num; i++)
+		dai_data->port_cfg.slot_mapping.offset[i] = tx_slot[i];
+	for (i = tx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
+		dai_data->port_cfg.slot_mapping.offset[i] =
+			AFE_SLOT_MAPPING_OFFSET_INVALID;
+
+	dai_data->port_cfg.slot_mapping.num_channel = tx_num;
+	break;
+	default:
+		dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
+			__func__, dai->id);
+		return -EINVAL;
+	}
+
+	return rc;
+}
+
+static int msm_dai_q6_group_mi2s_hw_params(struct snd_pcm_substream *substream,
+			struct snd_pcm_hw_params *params,
+			struct snd_soc_dai *dai)
+{
+	struct msm_dai_q6_group_mi2s_dai_data *dai_data =
+			dev_get_drvdata(dai->dev);
+	struct afe_param_id_group_device_i2s_cfg_v1 *group_mi2s_cfg =
+			&dai_data->group_cfg.i2s_cfg;
+	struct afe_param_id_i2s_cfg *dev_i2s_cfg =
+			&dai_data->port_cfg.i2s_cfg;
+	struct afe_param_id_slot_mapping_cfg *slot_mapping =
+			&dai_data->port_cfg.slot_mapping;
+
+	/* update group_mi2s group config param */
+	dai_data->channels = params_channels(params);
+	dai_data->rate = params_rate(params);
+
+	switch (params_format(params)) {
+	case SNDRV_PCM_FORMAT_S16_LE:
+	case SNDRV_PCM_FORMAT_SPECIAL:
+		dai_data->bit_width = 16;
+		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+	case SNDRV_PCM_FORMAT_S24_3LE:
+		dai_data->bit_width = 24;
+		break;
+	default:
+		pr_err("%s: format %d\n",
+			__func__, params_format(params));
+		return -EINVAL;
+	}
+
+	/* update group_mi2s config param */
+	group_mi2s_cfg->sample_rate = dai_data->rate;
+	group_mi2s_cfg->bit_width = dai_data->bit_width;
+	pr_debug("%s: Group MI2S GROUP 0x%x:\n"
+		"channel_mode = %d sample_rate = %d bit_width = %d\n",
+		__func__, group_mi2s_cfg->group_id,
+		group_mi2s_cfg->channel_mode,
+		group_mi2s_cfg->sample_rate,
+		group_mi2s_cfg->bit_width);
+	pr_debug("%s: Group MI2S GROUP 0x%x:\n"
+		"port_id[0]=0x%x port_id[1]=0x%x port_id[2]=0x%x port_id[3]=0x%x\n"
+		"port_id[4]=0x%x port_id[5]=0x%x port_id[6]=0x%x port_id[7]=0x%x\n",
+		__func__, group_mi2s_cfg->group_id,
+		group_mi2s_cfg->port_id[0],
+		group_mi2s_cfg->port_id[1],
+		group_mi2s_cfg->port_id[2],
+		group_mi2s_cfg->port_id[3],
+		group_mi2s_cfg->port_id[4],
+		group_mi2s_cfg->port_id[5],
+		group_mi2s_cfg->port_id[6],
+		group_mi2s_cfg->port_id[7]);
+	/*i2s port cfg*/
+	dev_i2s_cfg->i2s_cfg_minor_version =
+		AFE_API_VERSION_I2S_CONFIG;
+	dev_i2s_cfg->bit_width = group_mi2s_cfg->bit_width;
+	dev_i2s_cfg->mono_stereo = AFE_PORT_I2S_STEREO;
+	dev_i2s_cfg->sample_rate = group_mi2s_cfg->sample_rate;
+	dev_i2s_cfg->data_format = AFE_LINEAR_PCM_DATA;
+	dev_i2s_cfg->ws_src = dai_data->sync_mode;
+	pr_debug("%s: MI2S port:\n"
+		"dai id %d dai_data->channels = %d\n"
+		"sample_rate = %u i2s_cfg_minor_version = 0x%x\n"
+		"bit_width = %hu  channel_mode = 0x%x mono_stereo = %#x\n"
+		"ws_src = 0x%x sample_rate = %u data_format = 0x%x\n"
+		"reserved = %u\n", __func__, dai->id, dai_data->channels,
+		dai_data->rate, dev_i2s_cfg->i2s_cfg_minor_version,
+		dev_i2s_cfg->bit_width, dev_i2s_cfg->channel_mode,
+		dev_i2s_cfg->mono_stereo, dev_i2s_cfg->ws_src,
+		dev_i2s_cfg->sample_rate, dev_i2s_cfg->data_format,
+		dev_i2s_cfg->reserved);
+
+	/*slot mapping cfg*/
+	slot_mapping->minor_version =
+		AFE_API_VERSION_SLOT_MAPPING_CONFIG;
+	slot_mapping->bitwidth = group_mi2s_cfg->bit_width;
+	slot_mapping->data_align_type =
+		AFE_SLOT_MAPPING_DATA_ALIGN_MSB;
+	pr_debug("%s: Group MI2S port 0x%x SLOT MAPPING:\n"
+		"num_channel=%d bitwidth=%d data_align=0x%x\n",
+		__func__, dai->id,
+		slot_mapping->num_channel,
+		slot_mapping->bitwidth,
+		slot_mapping->data_align_type);
+	pr_debug("%s: Group MI2S port 0x%x SLOT MAPPING:\n"
+		"offset[0]=0x%x offset[1]=0x%x offset[2]=0x%x offset[3]=0x%x\n"
+		"offset[4]=0x%x offset[5]=0x%x offset[6]=0x%x offset[7]=0x%x\n",
+		__func__, dai->id,
+		slot_mapping->offset[0],
+		slot_mapping->offset[1],
+		slot_mapping->offset[2],
+		slot_mapping->offset[3],
+		slot_mapping->offset[4],
+		slot_mapping->offset[5],
+		slot_mapping->offset[6],
+		slot_mapping->offset[7]);
+
+	return 0;
+}
+
+static int msm_dai_q6_group_mi2s_prepare(struct snd_pcm_substream *substream,
+			struct snd_soc_dai *dai)
+{
+	int rc = 0;
+	struct msm_dai_q6_group_mi2s_dai_data *dai_data =
+		dev_get_drvdata(dai->dev);
+	u16 group_id = dai_data->group_cfg.i2s_cfg.group_id;
+	int group_idx = 0;
+	atomic_t *group_ref = NULL;
+
+	group_idx = msm_dai_q6_get_mi2s_group_idx(dai->id);
+	if (group_idx < 0 || group_idx > IDX_GROUP_MI2S_MAX) {
+		dev_err(dai->dev, "%s port id 0x%x not supported\n",
+			__func__, dai->id);
+		return -EINVAL;
+	}
+
+	mutex_lock(&group_mi2s_mutex);
+
+	group_ref = &group_mi2s_ref[group_idx];
+
+	if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
+		/* PORT START should be set if prepare called
+		 * in active state.
+		 */
+		if (atomic_read(group_ref) == 0) {
+			/*
+			 * TX and RX share the same clk.
+			 * AFE clk is enabled per group to simplify the logic.
+			 * DSP will monitor the clk count.
+			 */
+			rc = msm_dai_q6_group_mi2s_set_clk(dai_data,
+				dai->id, true);
+			if (IS_ERR_VALUE(rc)) {
+				dev_err(dai->dev, "%s: fail to enable AFE clk 0x%x\n",
+					__func__, dai->id);
+				goto rtn;
+			}
+
+			/*
+			 * if only one port, don't do group enable as there
+			 * is no group need for only one port
+			 */
+			if (dai_data->num_group_ports > 1) {
+				rc = afe_port_group_mi2s_enable(group_id,
+					&dai_data->group_cfg, true);
+				if (IS_ERR_VALUE(rc)) {
+					dev_err(dai->dev,
+					"%s: fail to enable AFE group 0x%x\n",
+					__func__, group_id);
+					goto rtn;
+				}
+			}
+		}
+
+		rc = afe_i2s_port_start(dai->id, &dai_data->port_cfg,
+			dai_data->rate, dai_data->num_group_ports);
+		if (IS_ERR_VALUE(rc)) {
+			if (atomic_read(group_ref) == 0) {
+				afe_port_group_mi2s_enable(group_id,
+					NULL, false);
+				msm_dai_q6_group_mi2s_set_clk(dai_data,
+					dai->id, false);
+			}
+			dev_err(dai->dev, "%s: fail to open AFE port 0x%x\n",
+				__func__, dai->id);
+		} else {
+			set_bit(STATUS_PORT_STARTED,
+				dai_data->status_mask);
+			atomic_inc(group_ref);
+		}
+	}
+
+rtn:
+	mutex_unlock(&group_mi2s_mutex);
+	return rc;
+}
+
+static void msm_dai_q6_group_mi2s_shutdown(struct snd_pcm_substream *substream,
+				struct snd_soc_dai *dai)
+{
+	int rc = 0;
+	struct msm_dai_q6_group_mi2s_dai_data *dai_data =
+		dev_get_drvdata(dai->dev);
+	u16 group_id = dai_data->group_cfg.i2s_cfg.group_id;
+	int group_idx = 0;
+	atomic_t *group_ref = NULL;
+
+	group_idx = msm_dai_q6_get_mi2s_group_idx(dai->id);
+	if (group_idx < 0 || group_idx > IDX_GROUP_MI2S_MAX) {
+		dev_err(dai->dev, "%s port id 0x%x not supported\n",
+			__func__, dai->id);
+		return;
+	}
+
+	mutex_lock(&group_mi2s_mutex);
+	group_ref = &group_mi2s_ref[group_idx];
+
+	if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
+		rc = afe_close(dai->id);
+		if (IS_ERR_VALUE(rc)) {
+			dev_err(dai->dev, "%s: fail to close AFE port 0x%x\n",
+				__func__, dai->id);
+		}
+		atomic_dec(group_ref);
+		clear_bit(STATUS_PORT_STARTED,
+			dai_data->status_mask);
+
+		if (atomic_read(group_ref) == 0) {
+			rc = afe_port_group_mi2s_enable(group_id,
+				NULL, false);
+			if (IS_ERR_VALUE(rc)) {
+				dev_err(dai->dev, "%s: fail to disable AFE group 0x%x\n",
+					__func__, group_id);
+			}
+			rc = msm_dai_q6_group_mi2s_set_clk(dai_data,
+				dai->id, false);
+			if (IS_ERR_VALUE(rc)) {
+				dev_err(dai->dev, "%s: fail to disable AFE clk 0x%x\n",
+					__func__, dai->id);
+			}
+		}
+	}
+
+	mutex_unlock(&group_mi2s_mutex);
+}
+
+static struct snd_soc_dai_ops msm_dai_q6_group_mi2s_ops = {
+	.prepare          = msm_dai_q6_group_mi2s_prepare,
+	.hw_params        = msm_dai_q6_group_mi2s_hw_params,
+	.set_channel_map  = msm_dai_q6_group_mi2s_set_channel_map,
+	.shutdown         = msm_dai_q6_group_mi2s_shutdown,
+};
+
+static struct snd_soc_dai_driver msm_dai_q6_group_mi2s_dai[] = {
+	{
+		.playback = {
+			.stream_name = "Secondary MI2S1 Playback",
+			.aif_name = "SEC_MI2S_RX_1",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_RX_1,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Secondary MI2S2 Playback",
+			.aif_name = "SEC_MI2S_RX_2",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_RX_2,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Secondary MI2S3 Playback",
+			.aif_name = "SEC_MI2S_RX_3",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_RX_3,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Secondary MI2S4 Playback",
+			.aif_name = "SEC_MI2S_RX_4",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_RX_4,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Secondary MI2S1 Capture",
+			.aif_name = "SEC_MI2S_TX_1",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_TX_1,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Secondary MI2S2 Capture",
+			.aif_name = "SEC_MI2S_TX_2",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_TX_2,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Secondary MI2S3 Capture",
+			.aif_name = "SEC_MI2S_TX_3",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_TX_3,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Secondary MI2S4 Capture",
+			.aif_name = "SEC_MI2S_TX_4",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_SECONDARY_MI2S_TX_4,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Tertiary MI2S1 Playback",
+			.aif_name = "TERT_MI2S_RX_1",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_RX_1,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Tertiary MI2S2 Playback",
+			.aif_name = "TERT_MI2S_RX_2",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_RX_2,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Tertiary MI2S3 Playback",
+			.aif_name = "TERT_MI2S_RX_3",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_RX_3,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Tertiary MI2S4 Playback",
+			.aif_name = "TERT_MI2S_RX_4",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_RX_4,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Tertiary MI2S1 Capture",
+			.aif_name = "TERT_MI2S_TX_1",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_TX_1,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Tertiary MI2S2 Capture",
+			.aif_name = "TERT_MI2S_TX_2",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_TX_2,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Tertiary MI2S3 Capture",
+			.aif_name = "TERT_MI2S_TX_3",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_TX_3,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Tertiary MI2S4 Capture",
+			.aif_name = "TERT_MI2S_TX_4",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_TERTIARY_MI2S_TX_4,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Quaternary MI2S1 Playback",
+			.aif_name = "QUAT_MI2S_RX_1",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_RX_1,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Quaternary MI2S2 Playback",
+			.aif_name = "QUAT_MI2S_RX_2",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_RX_2,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Quaternary MI2S3 Playback",
+			.aif_name = "QUAT_MI2S_RX_3",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_RX_3,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Quaternary MI2S4 Playback",
+			.aif_name = "QUAT_MI2S_RX_4",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_RX_4,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Quaternary MI2S1 Capture",
+			.aif_name = "QUAT_MI2S_TX_1",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_TX_1,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Quaternary MI2S2 Capture",
+			.aif_name = "QUAT_MI2S_TX_2",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_TX_2,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Quaternary MI2S3 Capture",
+			.aif_name = "QUAT_MI2S_TX_3",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_TX_3,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Quaternary MI2S4 Capture",
+			.aif_name = "QUAT_MI2S_TX_4",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
+				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
+				SNDRV_PCM_RATE_192000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S24_3LE,
+			.rate_min = 8000,
+			.rate_max = 192000,
+		},
+		.ops = &msm_dai_q6_group_mi2s_ops,
+		.id = AFE_PORT_ID_QUATERNARY_MI2S_TX_4,
+		.probe = msm_dai_q6_dai_group_mi2s_probe,
+		.remove = msm_dai_q6_dai_group_mi2s_remove,
+	}
+};
 
 static int msm_dai_q6_mi2s_get_lineconfig(u16 sd_lines, u16 *config_ptr,
 					  unsigned int *ch_cnt)
@@ -4923,6 +5977,297 @@ static struct platform_driver msm_dai_q6_mi2s_driver = {
 	},
 };
 
+static int msm_dai_group_mi2s_probe(struct platform_device *pdev)
+{
+	int rc = 0;
+
+	/* probe child node info */
+	rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
+			__func__, rc);
+		goto rtn;
+	} else
+		dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
+
+rtn:
+	return rc;
+}
+
+static int msm_dai_group_mi2s_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static int msm_dai_q6_group_mi2s_dev_id_validation(u32 dev_id)
+{
+	switch (dev_id) {
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
+static const struct snd_soc_component_driver msm_q6_group_mi2s_dai_component = {
+	.name = "msm-dai-q6-mi2s-group",
+};
+
+static int msm_dai_group_mi2s_dev_probe(struct platform_device *pdev)
+{
+	int rc = 0;
+	struct msm_dai_q6_group_mi2s_dai_data *dai_data = NULL;
+	u32 mi2s_dev_id = 0;
+	u32 ch_mode = 0;
+	int port_idx = 0;
+	struct device_node *mi2s_parent_node = NULL;
+	u32 num_group_mi2s_ports = 0;
+	const uint32_t *port_id_array = NULL;
+	u32 array_length, i = 0;
+	u32 group_idx = 0;
+	u32 sync_mode = 0;
+
+	mi2s_parent_node = of_get_parent(pdev->dev.of_node);
+	/* extract mi2s group info into static */
+	rc = of_property_read_u32(mi2s_parent_node,
+			"qcom,msm-cpudai-mi2s-group-id",
+			(u32 *)&group_mi2s_cfg.group_id);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: Group ID from DT file %s\n",
+			__func__, "qcom,msm-cpudai-mi2s-group-id");
+		goto rtn;
+	}
+
+	rc = of_property_read_u32(mi2s_parent_node,
+			"qcom,msm-cpudai-mi2s-group-num-ports",
+			&num_group_mi2s_ports);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: ch_mode from DT file %s\n",
+			__func__, "qcom,msm-cpudai-mi2s-group-num-ports");
+		goto rtn;
+	}
+
+	if (num_group_mi2s_ports > AFE_GROUP_DEVICE_NUM_PORTS) {
+		dev_err(&pdev->dev, "%s: Group Num Ports %d greater than Man %d\n",
+			__func__, num_group_mi2s_ports,
+			AFE_GROUP_DEVICE_NUM_PORTS);
+		rc = -EINVAL;
+		goto rtn;
+	}
+
+	port_id_array = of_get_property(mi2s_parent_node,
+				"qcom,msm-cpudai-mi2s-group-port-id",
+				&array_length);
+	if (port_id_array == NULL) {
+		dev_err(&pdev->dev, "%s: prot_id_array is not valid\n",
+			__func__);
+		rc = -EINVAL;
+		goto rtn;
+	}
+	if (array_length != sizeof(uint32_t) * num_group_mi2s_ports) {
+		dev_err(&pdev->dev, "%s array_length is %d, expected is %zd\n",
+			__func__, array_length,
+			sizeof(uint32_t) * num_group_mi2s_ports);
+		rc = -EINVAL;
+		goto rtn;
+	}
+
+	for (i = 0; i < num_group_mi2s_ports; i++)
+		group_mi2s_cfg.port_id[i] = (u16)be32_to_cpu(port_id_array[i]);
+	/* Unused index should be filled with AFE_PORT_INVALID */
+	for (i = num_group_mi2s_ports; i < AFE_GROUP_DEVICE_NUM_PORTS; i++)
+		group_mi2s_cfg.port_id[i] = AFE_PORT_INVALID;
+
+	/*extract group_mi2s group sd line info into static */
+	rc = of_property_read_u32(mi2s_parent_node,
+			"qcom,msm-cpudai-mi2s-channel-mode",
+			&ch_mode);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: ch_mode from DT file %s\n",
+			__func__, "qcom,msm-cpudai-mi2s-channel-mode");
+		goto rtn;
+	}
+
+	group_mi2s_cfg.channel_mode = ch_mode;
+	group_mi2s_cfg.minor_version = AFE_API_VERSION_I2S_CONFIG;
+	group_idx = msm_dai_q6_get_mi2s_group_idx(group_mi2s_cfg.group_id);
+	if (group_idx < 0 || group_idx > IDX_GROUP_MI2S_MAX) {
+		dev_err(&pdev->dev, "%s: group id 0x%x not supported\n",
+			__func__, group_mi2s_cfg.group_id);
+		rc = -EINVAL;
+		goto rtn;
+	}
+	atomic_set(&group_mi2s_ref[group_idx], 0);
+
+	rc = of_property_read_u32(mi2s_parent_node,
+			"qcom,msm-cpudai-mi2s-sync-mode",
+			&sync_mode);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: ch_mode from DT file %s\n",
+			__func__, "qcom,msm-cpudai-mi2s-sync-mode");
+		goto rtn;
+	}
+
+	rc = of_property_read_u32(mi2s_parent_node,
+			"qcom,msm-cpudai-mi2s-mclk",
+			&group_mi2s_mclk_set.clk_freq_in_hz);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: mclk from DT file %s\n",
+			__func__, "qcom,msm-cpudai-mi2s-mclk");
+		goto rtn;
+	}
+
+	rc = of_property_read_u32(mi2s_parent_node,
+			"qcom,msm-cpudai-mi2s-bclk",
+			&group_mi2s_bclk_set.clk_freq_in_hz);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: bclk from DT file %s\n",
+			__func__, "qcom,msm-cpudai-mi2s-bclk");
+		goto rtn;
+	}
+
+	/*update default group mi2s clk set for master/slave select*/
+	rc = msm_dai_q6_group_mi2s_set_clk_param(group_mi2s_cfg.group_id,
+				&group_mi2s_mclk_set,
+				&group_mi2s_bclk_set,
+				sync_mode);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: group id not supported 0x%x\n",
+			__func__, tdm_group_cfg.group_id);
+		goto rtn;
+	}
+
+	/* retrieve device/afe id */
+	rc = of_property_read_u32(pdev->dev.of_node,
+			"qcom,msm-cpudai-mi2s-dev-id",
+			&mi2s_dev_id);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: DeviceID missing in DT file\n",
+			__func__);
+		goto rtn;
+	}
+	rc = msm_dai_q6_group_mi2s_dev_id_validation(mi2s_dev_id);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: Invalid GMI2S device ID %d in DT file\n",
+			__func__, mi2s_dev_id);
+		rc = -ENXIO;
+		goto rtn;
+	}
+
+	pdev->id = mi2s_dev_id;
+	rc = of_property_read_u32(pdev->dev.of_node,
+			"qcom,msm-cpudai-mi2s-dev-channel-mode",
+			&ch_mode);
+	if (rc) {
+		dev_err(&pdev->dev, "%s: TX line from DT file %s\n",
+			__func__, "qcom,msm-cpudai-mi2s-dev-channel-mode");
+		goto rtn;
+	}
+
+	dai_data = kzalloc(sizeof(*dai_data),
+			GFP_KERNEL);
+	if (!dai_data) {
+		rc = -ENOMEM;
+		goto rtn;
+	}
+	dev_set_drvdata(&pdev->dev, dai_data);
+
+	dai_data->sync_mode = sync_mode;
+	dai_data->num_group_ports = num_group_mi2s_ports;
+	dai_data->port_cfg.i2s_cfg.channel_mode = ch_mode;
+	dai_data->bclk_set = group_mi2s_bclk_set;
+	dai_data->mclk_set = group_mi2s_mclk_set;
+	dai_data->group_cfg.i2s_cfg = group_mi2s_cfg;
+
+	port_idx = msm_dai_q6_get_mi2s_port_idx(mi2s_dev_id);
+	if (port_idx < 0 || port_idx > IDX_GROUP_MI2S_PORT_MAX) {
+		dev_err(&pdev->dev, "%s: Port id 0x%x not supported\n",
+			__func__, mi2s_dev_id);
+		rc = -EINVAL;
+		goto free_dai_data;
+	}
+
+	rc = snd_soc_register_component(&pdev->dev,
+			&msm_q6_group_mi2s_dai_component,
+			&msm_dai_q6_group_mi2s_dai[port_idx], 1);
+	if (rc) {
+		dev_err(&pdev->dev,
+			"%s: fail to register msm_q6_group_mi2s_dai_component\n",
+			__func__);
+		goto free_dai_data;
+	}
+
+	return 0;
+
+free_dai_data:
+	kfree(dai_data);
+rtn:
+	return rc;
+}
+
+static int msm_dai_group_mi2s_dev_remove(struct platform_device *pdev)
+{
+	snd_soc_unregister_component(&pdev->dev);
+	return 0;
+}
+
+static const struct of_device_id msm_dai_group_mi2s_dt_match[] = {
+	{ .compatible = "qcom,msm-dai-group-mi2s", },
+	{ }
+};
+
+MODULE_DEVICE_TABLE(of, msm_dai_group_mi2s_dt_match);
+
+static struct platform_driver msm_dai_group_mi2s_driver = {
+	.probe  = msm_dai_group_mi2s_probe,
+	.remove = msm_dai_group_mi2s_remove,
+	.driver = {
+		.name = "msm-dai-group-mi2s",
+		.owner = THIS_MODULE,
+		.of_match_table = msm_dai_group_mi2s_dt_match,
+	},
+};
+
+static const struct of_device_id msm_dai_group_mi2s_dev_dt_match[] = {
+	{ .compatible = "qcom,msm-dai-group-mi2s-dev", },
+	{ }
+};
+
+MODULE_DEVICE_TABLE(of, msm_dai_group_mi2s_dev_dt_match);
+
+static struct platform_driver msm_dai_group_mi2s_dev_driver = {
+	.probe  = msm_dai_group_mi2s_dev_probe,
+	.remove = msm_dai_group_mi2s_dev_remove,
+	.driver = {
+		.name = "msm-dai-group-mi2s-dev",
+		.owner = THIS_MODULE,
+		.of_match_table = msm_dai_group_mi2s_dev_dt_match,
+	},
+};
+
 static int msm_dai_q6_spdif_dev_probe(struct platform_device *pdev)
 {
 	int rc;
@@ -8344,8 +9689,27 @@ static int __init msm_dai_q6_init(void)
 		pr_err("%s: fail to register dai TDM\n", __func__);
 		goto dai_tdm_q6_fail;
 	}
+
+	rc = platform_driver_register(&msm_dai_group_mi2s_dev_driver);
+	if (rc) {
+		pr_err("%s: fail to register dai GMI2S dev drv\n",
+			__func__);
+		goto dai_q6_group_mi2s_dev_fail;
+	}
+
+	rc = platform_driver_register(&msm_dai_group_mi2s_driver);
+	if (rc) {
+		pr_err("%s: fail to register dai GMI2S\n",
+			__func__);
+		goto dai_group_mi2s_fail;
+	}
+
 	return rc;
 
+dai_group_mi2s_fail:
+	platform_driver_unregister(&msm_dai_group_mi2s_driver);
+dai_q6_group_mi2s_dev_fail:
+	platform_driver_unregister(&msm_dai_group_mi2s_dev_driver);
 dai_tdm_q6_fail:
 	platform_driver_unregister(&msm_dai_q6_tdm_driver);
 dai_q6_tdm_drv_fail:
@@ -8371,6 +9735,8 @@ static void __exit msm_dai_q6_exit(void)
 	platform_driver_unregister(&msm_dai_q6);
 	platform_driver_unregister(&msm_auxpcm_dev_driver);
 	platform_driver_unregister(&msm_dai_q6_spdif_driver);
+	platform_driver_unregister(&msm_dai_group_mi2s_driver);
+	platform_driver_unregister(&msm_dai_group_mi2s_dev_driver);
 }
 module_exit(msm_dai_q6_exit);
 
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
index b0843bca62bf..ee8c42903c99 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
@@ -546,6 +546,54 @@ struct msm_pcm_routing_bdai_data msm_bedais[MSM_BACKEND_DAI_MAX] = {
 	  LPASS_BE_INT6_MI2S_RX},
 	{ AFE_PORT_ID_INT6_MI2S_TX, 0, {0}, {0}, 0, 0, 0, 0, {0},
 	  LPASS_BE_INT6_MI2S_TX},
+	{ AFE_PORT_ID_SECONDARY_MI2S_RX_1, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_RX_1},
+	{ AFE_PORT_ID_SECONDARY_MI2S_RX_2, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_RX_2},
+	{ AFE_PORT_ID_SECONDARY_MI2S_RX_3, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_RX_3},
+	{ AFE_PORT_ID_SECONDARY_MI2S_RX_4, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_RX_4},
+	{ AFE_PORT_ID_SECONDARY_MI2S_TX_1, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_TX_1},
+	{ AFE_PORT_ID_SECONDARY_MI2S_TX_2, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_TX_2},
+	{ AFE_PORT_ID_SECONDARY_MI2S_TX_3, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_TX_3},
+	{ AFE_PORT_ID_SECONDARY_MI2S_TX_4, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_SEC_MI2S_TX_4},
+	{ AFE_PORT_ID_TERTIARY_MI2S_RX_1, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_RX_1},
+	{ AFE_PORT_ID_TERTIARY_MI2S_RX_2, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_RX_2},
+	{ AFE_PORT_ID_TERTIARY_MI2S_RX_3, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_RX_3},
+	{ AFE_PORT_ID_TERTIARY_MI2S_RX_4, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_RX_4},
+	{ AFE_PORT_ID_TERTIARY_MI2S_TX_1, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_TX_1},
+	{ AFE_PORT_ID_TERTIARY_MI2S_TX_2, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_TX_2},
+	{ AFE_PORT_ID_TERTIARY_MI2S_TX_3, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_TX_3},
+	{ AFE_PORT_ID_TERTIARY_MI2S_TX_4, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_TERT_MI2S_TX_4},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_RX_1, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_RX_1},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_RX_2, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_RX_2},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_RX_3, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_RX_3},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_RX_4, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_RX_4},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_TX_1, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_TX_1},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_TX_2, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_TX_2},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_TX_3, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_TX_3},
+	{ AFE_PORT_ID_QUATERNARY_MI2S_TX_4, 0, {0}, {0}, 0, 0, 0, 0, {0},
+	  LPASS_BE_QUAT_MI2S_TX_4}
 };
 
 /* Track ASM playback & capture sessions of DAI
@@ -4723,6 +4771,834 @@ static const struct snd_kcontrol_new secondary_mi2s_rx2_mixer_controls[] = {
 	msm_routing_put_audio_mixer),
 };
 
+static const struct snd_kcontrol_new secondary_mi2s_rx_1_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new secondary_mi2s_rx_2_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new secondary_mi2s_rx_3_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new secondary_mi2s_rx_4_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new tertiary_mi2s_rx_1_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new tertiary_mi2s_rx_2_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new tertiary_mi2s_rx_3_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new tertiary_mi2s_rx_4_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new quaternary_mi2s_rx_1_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new quaternary_mi2s_rx_2_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new quaternary_mi2s_rx_3_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
+static const struct snd_kcontrol_new quaternary_mi2s_rx_4_mixer_controls[] = {
+	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia17", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA17, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia18", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA18, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia19", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA19, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia26", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA26, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia28", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA28, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("MultiMedia29", MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA29, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+};
+
 static const struct snd_kcontrol_new secondary_mi2s_rx_mixer_controls[] = {
 	SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_SECONDARY_MI2S_RX ,
 	MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
@@ -7215,6 +8091,42 @@ static const struct snd_kcontrol_new mmul1_mixer_controls[] = {
 	SOC_SINGLE_EXT("USB_AUDIO_TX", MSM_BACKEND_DAI_USB_TX,
 		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
 		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_1", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_2", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_3", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_4", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_1", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_2", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_3", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_4", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_1", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_2", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_3", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_4", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
+		MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer,
+		msm_routing_put_audio_mixer),
 };
 
 static const struct snd_kcontrol_new mmul2_mixer_controls[] = {
@@ -7308,6 +8220,42 @@ static const struct snd_kcontrol_new mmul2_mixer_controls[] = {
 	SOC_SINGLE_EXT("USB_AUDIO_TX", MSM_BACKEND_DAI_USB_TX,
 	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
 	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_1", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_2", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_3", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_4", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_1", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_2", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_3", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_4", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_1", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_2", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_3", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_4", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
 };
 
 static const struct snd_kcontrol_new mmul3_mixer_controls[] = {
@@ -7398,6 +8346,42 @@ static const struct snd_kcontrol_new mmul3_mixer_controls[] = {
 	SOC_SINGLE_EXT("QUAT_TDM_TX_3", MSM_BACKEND_DAI_QUAT_TDM_TX_3,
 	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
 	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_1", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_2", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_3", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_4", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_1", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_2", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_3", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_4", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_1", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_2", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_3", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_4", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
 };
 
 static const struct snd_kcontrol_new mmul4_mixer_controls[] = {
@@ -7593,6 +8577,42 @@ static const struct snd_kcontrol_new mmul5_mixer_controls[] = {
 	SOC_SINGLE_EXT("USB_AUDIO_TX", MSM_BACKEND_DAI_USB_TX,
 	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
 	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_1", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_2", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_3", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_4", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_1", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_2", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_3", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_4", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_1", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_2", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_3", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_4", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
 };
 
 static const struct snd_kcontrol_new mmul6_mixer_controls[] = {
@@ -7938,6 +8958,42 @@ static const struct snd_kcontrol_new mmul9_mixer_controls[] = {
 	SOC_SINGLE_EXT("QUAT_TDM_TX_3", MSM_BACKEND_DAI_QUAT_TDM_TX_3,
 	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
 	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_1", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_2", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_3", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_4", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_1", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_2", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_3", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_4", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_1", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_2", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_3", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_4", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
 };
 
 static const struct snd_kcontrol_new mmul17_mixer_controls[] = {
@@ -8091,6 +9147,42 @@ static const struct snd_kcontrol_new mmul20_mixer_controls[] = {
 	SOC_SINGLE_EXT("QUAT_TDM_TX_3", MSM_BACKEND_DAI_QUAT_TDM_TX_3,
 	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
 	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_1", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_2", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_3", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("SEC_MI2S_TX_4", MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_1", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_2", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_3", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("TERT_MI2S_TX_4", MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_1", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_2", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_3", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
+	SOC_SINGLE_EXT("QUAT_MI2S_TX_4", MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
+	MSM_FRONTEND_DAI_MULTIMEDIA20, 1, 0, msm_routing_get_audio_mixer,
+	msm_routing_put_audio_mixer),
 };
 
 static const struct snd_kcontrol_new mmul21_mixer_controls[] = {
@@ -12773,6 +13865,56 @@ static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = {
 				0, 0, 0 , 0),
 	SND_SOC_DAPM_AIF_IN("PCM_TX", "AFE Capture",
 				0, 0, 0 , 0),
+	SND_SOC_DAPM_AIF_IN("SEC_MI2S_TX_1", "Secondary MI2S1 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("SEC_MI2S_TX_2", "Secondary MI2S2 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("SEC_MI2S_TX_3", "Secondary MI2S3 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("SEC_MI2S_TX_4", "Secondary MI2S4 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("TERT_MI2S_TX_1", "Tertiary MI2S1 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("TERT_MI2S_TX_2", "Tertiary MI2S2 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("TERT_MI2S_TX_3", "Tertiary MI2S3 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("TERT_MI2S_TX_4", "Tertiary MI2S4 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("QUAT_MI2S_TX_1", "Quaternary MI2S1 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("QUAT_MI2S_TX_2", "Quaternary MI2S2 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("QUAT_MI2S_TX_3", "Quaternary MI2S3 Capture",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_IN("QUAT_MI2S_TX_4", "Quaternary MI2S4 Capture",
+				0, 0, 0, 0),
+
+	SND_SOC_DAPM_AIF_OUT("SEC_MI2S_RX_1", "Secondary MI2S1 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("SEC_MI2S_RX_2", "Secondary MI2S2 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("SEC_MI2S_RX_3", "Secondary MI2S3 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("SEC_MI2S_RX_4", "Secondary MI2S4 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("TERT_MI2S_RX_1", "Tertiary MI2S1 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("TERT_MI2S_RX_2", "Tertiary MI2S2 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("TERT_MI2S_RX_3", "Tertiary MI2S3 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("TERT_MI2S_RX_4", "Tertiary MI2S4 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_RX_1", "Quaternary MI2S1 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_RX_2", "Quaternary MI2S2 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_RX_3", "Quaternary MI2S3 Playback",
+				0, 0, 0, 0),
+	SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_RX_4", "Quaternary MI2S4 Playback",
+				0, 0, 0, 0),
+
 	SND_SOC_DAPM_AIF_OUT("PRI_TDM_RX_0", "Primary TDM0 Playback",
 				0, 0, 0, 0),
 	SND_SOC_DAPM_AIF_IN("PRI_TDM_TX_0", "Primary TDM0 Capture",
@@ -13024,6 +14166,42 @@ static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = {
 	SND_SOC_DAPM_MIXER("TERT_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
 				tertiary_mi2s_rx_mixer_controls,
 				ARRAY_SIZE(tertiary_mi2s_rx_mixer_controls)),
+	SND_SOC_DAPM_MIXER("SEC_MI2S_RX_1 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   secondary_mi2s_rx_1_mixer_controls,
+			   ARRAY_SIZE(secondary_mi2s_rx_1_mixer_controls)),
+	SND_SOC_DAPM_MIXER("SEC_MI2S_RX_2 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   secondary_mi2s_rx_2_mixer_controls,
+			   ARRAY_SIZE(secondary_mi2s_rx_2_mixer_controls)),
+	SND_SOC_DAPM_MIXER("SEC_MI2S_RX_3 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   secondary_mi2s_rx_3_mixer_controls,
+			   ARRAY_SIZE(secondary_mi2s_rx_3_mixer_controls)),
+	SND_SOC_DAPM_MIXER("SEC_MI2S_RX_4 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   secondary_mi2s_rx_4_mixer_controls,
+			   ARRAY_SIZE(secondary_mi2s_rx_4_mixer_controls)),
+	SND_SOC_DAPM_MIXER("TERT_MI2S_RX_1 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   tertiary_mi2s_rx_1_mixer_controls,
+			   ARRAY_SIZE(tertiary_mi2s_rx_1_mixer_controls)),
+	SND_SOC_DAPM_MIXER("TERT_MI2S_RX_2 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   tertiary_mi2s_rx_2_mixer_controls,
+			   ARRAY_SIZE(tertiary_mi2s_rx_2_mixer_controls)),
+	SND_SOC_DAPM_MIXER("TERT_MI2S_RX_3 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   tertiary_mi2s_rx_3_mixer_controls,
+			   ARRAY_SIZE(tertiary_mi2s_rx_3_mixer_controls)),
+	SND_SOC_DAPM_MIXER("TERT_MI2S_RX_4 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   tertiary_mi2s_rx_4_mixer_controls,
+			   ARRAY_SIZE(tertiary_mi2s_rx_4_mixer_controls)),
+	SND_SOC_DAPM_MIXER("QUAT_MI2S_RX_1 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   quaternary_mi2s_rx_1_mixer_controls,
+			   ARRAY_SIZE(quaternary_mi2s_rx_1_mixer_controls)),
+	SND_SOC_DAPM_MIXER("QUAT_MI2S_RX_2 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   quaternary_mi2s_rx_2_mixer_controls,
+			   ARRAY_SIZE(quaternary_mi2s_rx_2_mixer_controls)),
+	SND_SOC_DAPM_MIXER("QUAT_MI2S_RX_3 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   quaternary_mi2s_rx_3_mixer_controls,
+			   ARRAY_SIZE(quaternary_mi2s_rx_3_mixer_controls)),
+	SND_SOC_DAPM_MIXER("QUAT_MI2S_RX_4 Audio Mixer", SND_SOC_NOPM, 0, 0,
+			   quaternary_mi2s_rx_4_mixer_controls,
+			   ARRAY_SIZE(quaternary_mi2s_rx_4_mixer_controls)),
 	SND_SOC_DAPM_MIXER("SEC_MI2S_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
 			   secondary_mi2s_rx_mixer_controls,
 			   ARRAY_SIZE(secondary_mi2s_rx_mixer_controls)),
@@ -14346,6 +15524,222 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"QUAT_TDM_RX_3 Audio Mixer", "MultiMedia26", "MM_DL26"},
 	{"QUAT_TDM_RX_3", NULL, "QUAT_TDM_RX_3 Audio Mixer"},
 
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"SEC_MI2S_RX_1 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"SEC_MI2S_RX_1", NULL, "SEC_MI2S_RX_1 Audio Mixer"},
+
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"SEC_MI2S_RX_2 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"SEC_MI2S_RX_2", NULL, "SEC_MI2S_RX_2 Audio Mixer"},
+
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"SEC_MI2S_RX_3 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"SEC_MI2S_RX_3", NULL, "SEC_MI2S_RX_3 Audio Mixer"},
+
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"SEC_MI2S_RX_4 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"SEC_MI2S_RX_4", NULL, "SEC_MI2S_RX_4 Audio Mixer"},
+
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"TERT_MI2S_RX_1 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"TERT_MI2S_RX_1", NULL, "TERT_MI2S_RX_1 Audio Mixer"},
+
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"TERT_MI2S_RX_2 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"TERT_MI2S_RX_2", NULL, "TERT_MI2S_RX_2 Audio Mixer"},
+
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"TERT_MI2S_RX_3 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"TERT_MI2S_RX_3", NULL, "TERT_MI2S_RX_3 Audio Mixer"},
+
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"TERT_MI2S_RX_4 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"TERT_MI2S_RX_4", NULL, "TERT_MI2S_RX_4 Audio Mixer"},
+
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"QUAT_MI2S_RX_1 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"QUAT_MI2S_RX_1", NULL, "QUAT_MI2S_RX_1 Audio Mixer"},
+
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"QUAT_MI2S_RX_2 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"QUAT_MI2S_RX_2", NULL, "QUAT_MI2S_RX_2 Audio Mixer"},
+
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"QUAT_MI2S_RX_3 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"QUAT_MI2S_RX_3", NULL, "QUAT_MI2S_RX_3 Audio Mixer"},
+
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia1", "MM_DL1"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia2", "MM_DL2"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia3", "MM_DL3"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia4", "MM_DL4"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia5", "MM_DL5"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia6", "MM_DL6"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia7", "MM_DL7"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia8", "MM_DL8"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia10", "MM_DL10"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia11", "MM_DL11"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia12", "MM_DL12"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia13", "MM_DL13"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia14", "MM_DL14"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia15", "MM_DL15"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia16", "MM_DL16"},
+	{"QUAT_MI2S_RX_4 Audio Mixer", "MultiMedia26", "MM_DL26"},
+	{"QUAT_MI2S_RX_4", NULL, "QUAT_MI2S_RX_4 Audio Mixer"},
+
 	{"MultiMedia1 Mixer", "PRI_TX", "PRI_I2S_TX"},
 	{"MultiMedia1 Mixer", "MI2S_TX", "MI2S_TX"},
 	{"MultiMedia2 Mixer", "MI2S_TX", "MI2S_TX"},
@@ -14423,6 +15817,19 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"MultiMedia1 Mixer", "QUAT_TDM_TX_2", "QUAT_TDM_TX_2"},
 	{"MultiMedia1 Mixer", "QUAT_TDM_TX_3", "QUAT_TDM_TX_3"},
 
+	{"MultiMedia1 Mixer", "SEC_MI2S_TX_1", "SEC_MI2S_TX_1"},
+	{"MultiMedia1 Mixer", "SEC_MI2S_TX_2", "SEC_MI2S_TX_2"},
+	{"MultiMedia1 Mixer", "SEC_MI2S_TX_3", "SEC_MI2S_TX_3"},
+	{"MultiMedia1 Mixer", "SEC_MI2S_TX_4", "SEC_MI2S_TX_4"},
+	{"MultiMedia1 Mixer", "TERT_MI2S_TX_1", "TERT_MI2S_TX_1"},
+	{"MultiMedia1 Mixer", "TERT_MI2S_TX_2", "TERT_MI2S_TX_2"},
+	{"MultiMedia1 Mixer", "TERT_MI2S_TX_3", "TERT_MI2S_TX_3"},
+	{"MultiMedia1 Mixer", "TERT_MI2S_TX_4", "TERT_MI2S_TX_4"},
+	{"MultiMedia1 Mixer", "QUAT_MI2S_TX_1", "QUAT_MI2S_TX_1"},
+	{"MultiMedia1 Mixer", "QUAT_MI2S_TX_2", "QUAT_MI2S_TX_2"},
+	{"MultiMedia1 Mixer", "QUAT_MI2S_TX_3", "QUAT_MI2S_TX_3"},
+	{"MultiMedia1 Mixer", "QUAT_MI2S_TX_4", "QUAT_MI2S_TX_4"},
+
 	{"MultiMedia2 Mixer", "PRI_TDM_TX_0", "PRI_TDM_TX_0"},
 	{"MultiMedia2 Mixer", "PRI_TDM_TX_1", "PRI_TDM_TX_1"},
 	{"MultiMedia2 Mixer", "PRI_TDM_TX_2", "PRI_TDM_TX_2"},
@@ -14439,6 +15846,18 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"MultiMedia2 Mixer", "QUAT_TDM_TX_1", "QUAT_TDM_TX_1"},
 	{"MultiMedia2 Mixer", "QUAT_TDM_TX_2", "QUAT_TDM_TX_2"},
 	{"MultiMedia2 Mixer", "QUAT_TDM_TX_3", "QUAT_TDM_TX_3"},
+	{"MultiMedia2 Mixer", "SEC_MI2S_TX_1", "SEC_MI2S_TX_1"},
+	{"MultiMedia2 Mixer", "SEC_MI2S_TX_2", "SEC_MI2S_TX_2"},
+	{"MultiMedia2 Mixer", "SEC_MI2S_TX_3", "SEC_MI2S_TX_3"},
+	{"MultiMedia2 Mixer", "SEC_MI2S_TX_4", "SEC_MI2S_TX_4"},
+	{"MultiMedia2 Mixer", "TERT_MI2S_TX_1", "TERT_MI2S_TX_1"},
+	{"MultiMedia2 Mixer", "TERT_MI2S_TX_2", "TERT_MI2S_TX_2"},
+	{"MultiMedia2 Mixer", "TERT_MI2S_TX_3", "TERT_MI2S_TX_3"},
+	{"MultiMedia2 Mixer", "TERT_MI2S_TX_4", "TERT_MI2S_TX_4"},
+	{"MultiMedia2 Mixer", "QUAT_MI2S_TX_1", "QUAT_MI2S_TX_1"},
+	{"MultiMedia2 Mixer", "QUAT_MI2S_TX_2", "QUAT_MI2S_TX_2"},
+	{"MultiMedia2 Mixer", "QUAT_MI2S_TX_3", "QUAT_MI2S_TX_3"},
+	{"MultiMedia2 Mixer", "QUAT_MI2S_TX_4", "QUAT_MI2S_TX_4"},
 
 	{"MultiMedia3 Mixer", "PRI_TDM_TX_0", "PRI_TDM_TX_0"},
 	{"MultiMedia3 Mixer", "PRI_TDM_TX_1", "PRI_TDM_TX_1"},
@@ -14456,6 +15875,18 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"MultiMedia3 Mixer", "QUAT_TDM_TX_1", "QUAT_TDM_TX_1"},
 	{"MultiMedia3 Mixer", "QUAT_TDM_TX_2", "QUAT_TDM_TX_2"},
 	{"MultiMedia3 Mixer", "QUAT_TDM_TX_3", "QUAT_TDM_TX_3"},
+	{"MultiMedia3 Mixer", "SEC_MI2S_TX_1", "SEC_MI2S_TX_1"},
+	{"MultiMedia3 Mixer", "SEC_MI2S_TX_2", "SEC_MI2S_TX_2"},
+	{"MultiMedia3 Mixer", "SEC_MI2S_TX_3", "SEC_MI2S_TX_3"},
+	{"MultiMedia3 Mixer", "SEC_MI2S_TX_4", "SEC_MI2S_TX_4"},
+	{"MultiMedia3 Mixer", "TERT_MI2S_TX_1", "TERT_MI2S_TX_1"},
+	{"MultiMedia3 Mixer", "TERT_MI2S_TX_2", "TERT_MI2S_TX_2"},
+	{"MultiMedia3 Mixer", "TERT_MI2S_TX_3", "TERT_MI2S_TX_3"},
+	{"MultiMedia3 Mixer", "TERT_MI2S_TX_4", "TERT_MI2S_TX_4"},
+	{"MultiMedia3 Mixer", "QUAT_MI2S_TX_1", "QUAT_MI2S_TX_1"},
+	{"MultiMedia3 Mixer", "QUAT_MI2S_TX_2", "QUAT_MI2S_TX_2"},
+	{"MultiMedia3 Mixer", "QUAT_MI2S_TX_3", "QUAT_MI2S_TX_3"},
+	{"MultiMedia3 Mixer", "QUAT_MI2S_TX_4", "QUAT_MI2S_TX_4"},
 
 	{"MultiMedia4 Mixer", "PRI_TDM_TX_0", "PRI_TDM_TX_0"},
 	{"MultiMedia4 Mixer", "PRI_TDM_TX_1", "PRI_TDM_TX_1"},
@@ -14490,6 +15921,18 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"MultiMedia5 Mixer", "QUAT_TDM_TX_1", "QUAT_TDM_TX_1"},
 	{"MultiMedia5 Mixer", "QUAT_TDM_TX_2", "QUAT_TDM_TX_2"},
 	{"MultiMedia5 Mixer", "QUAT_TDM_TX_3", "QUAT_TDM_TX_3"},
+	{"MultiMedia5 Mixer", "SEC_MI2S_TX_1", "SEC_MI2S_TX_1"},
+	{"MultiMedia5 Mixer", "SEC_MI2S_TX_2", "SEC_MI2S_TX_2"},
+	{"MultiMedia5 Mixer", "SEC_MI2S_TX_3", "SEC_MI2S_TX_3"},
+	{"MultiMedia5 Mixer", "SEC_MI2S_TX_4", "SEC_MI2S_TX_4"},
+	{"MultiMedia5 Mixer", "TERT_MI2S_TX_1", "TERT_MI2S_TX_1"},
+	{"MultiMedia5 Mixer", "TERT_MI2S_TX_2", "TERT_MI2S_TX_2"},
+	{"MultiMedia5 Mixer", "TERT_MI2S_TX_3", "TERT_MI2S_TX_3"},
+	{"MultiMedia5 Mixer", "TERT_MI2S_TX_4", "TERT_MI2S_TX_4"},
+	{"MultiMedia5 Mixer", "QUAT_MI2S_TX_1", "QUAT_MI2S_TX_1"},
+	{"MultiMedia5 Mixer", "QUAT_MI2S_TX_2", "QUAT_MI2S_TX_2"},
+	{"MultiMedia5 Mixer", "QUAT_MI2S_TX_3", "QUAT_MI2S_TX_3"},
+	{"MultiMedia5 Mixer", "QUAT_MI2S_TX_4", "QUAT_MI2S_TX_4"},
 
 	{"MultiMedia6 Mixer", "PRI_TDM_TX_0", "PRI_TDM_TX_0"},
 	{"MultiMedia6 Mixer", "PRI_TDM_TX_1", "PRI_TDM_TX_1"},
@@ -14533,11 +15976,35 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"MultiMedia9 Mixer", "QUAT_TDM_TX_1", "QUAT_TDM_TX_1"},
 	{"MultiMedia9 Mixer", "QUAT_TDM_TX_2", "QUAT_TDM_TX_2"},
 	{"MultiMedia9 Mixer", "QUAT_TDM_TX_3", "QUAT_TDM_TX_3"},
+	{"MultiMedia9 Mixer", "SEC_MI2S_TX_1", "SEC_MI2S_TX_1"},
+	{"MultiMedia9 Mixer", "SEC_MI2S_TX_2", "SEC_MI2S_TX_2"},
+	{"MultiMedia9 Mixer", "SEC_MI2S_TX_3", "SEC_MI2S_TX_3"},
+	{"MultiMedia9 Mixer", "SEC_MI2S_TX_4", "SEC_MI2S_TX_4"},
+	{"MultiMedia9 Mixer", "TERT_MI2S_TX_1", "TERT_MI2S_TX_1"},
+	{"MultiMedia9 Mixer", "TERT_MI2S_TX_2", "TERT_MI2S_TX_2"},
+	{"MultiMedia9 Mixer", "TERT_MI2S_TX_3", "TERT_MI2S_TX_3"},
+	{"MultiMedia9 Mixer", "TERT_MI2S_TX_4", "TERT_MI2S_TX_4"},
+	{"MultiMedia9 Mixer", "QUAT_MI2S_TX_1", "QUAT_MI2S_TX_1"},
+	{"MultiMedia9 Mixer", "QUAT_MI2S_TX_2", "QUAT_MI2S_TX_2"},
+	{"MultiMedia9 Mixer", "QUAT_MI2S_TX_3", "QUAT_MI2S_TX_3"},
+	{"MultiMedia9 Mixer", "QUAT_MI2S_TX_4", "QUAT_MI2S_TX_4"},
 
 	{"MultiMedia20 Mixer", "PRI_MI2S_TX", "PRI_MI2S_TX"},
 	{"MultiMedia20 Mixer", "SEC_MI2S_TX", "SEC_MI2S_TX"},
 	{"MultiMedia20 Mixer", "TERT_MI2S_TX", "TERT_MI2S_TX"},
 	{"MultiMedia20 Mixer", "QUAT_MI2S_TX", "QUAT_MI2S_TX"},
+	{"MultiMedia20 Mixer", "SEC_MI2S_TX_1", "SEC_MI2S_TX_1"},
+	{"MultiMedia20 Mixer", "SEC_MI2S_TX_2", "SEC_MI2S_TX_2"},
+	{"MultiMedia20 Mixer", "SEC_MI2S_TX_3", "SEC_MI2S_TX_3"},
+	{"MultiMedia20 Mixer", "SEC_MI2S_TX_4", "SEC_MI2S_TX_4"},
+	{"MultiMedia20 Mixer", "TERT_MI2S_TX_1", "TERT_MI2S_TX_1"},
+	{"MultiMedia20 Mixer", "TERT_MI2S_TX_2", "TERT_MI2S_TX_2"},
+	{"MultiMedia20 Mixer", "TERT_MI2S_TX_3", "TERT_MI2S_TX_3"},
+	{"MultiMedia20 Mixer", "TERT_MI2S_TX_4", "TERT_MI2S_TX_4"},
+	{"MultiMedia20 Mixer", "QUAT_MI2S_TX_1", "QUAT_MI2S_TX_1"},
+	{"MultiMedia20 Mixer", "QUAT_MI2S_TX_2", "QUAT_MI2S_TX_2"},
+	{"MultiMedia20 Mixer", "QUAT_MI2S_TX_3", "QUAT_MI2S_TX_3"},
+	{"MultiMedia20 Mixer", "QUAT_MI2S_TX_4", "QUAT_MI2S_TX_4"},
 	{"MultiMedia20 Mixer", "PRI_TDM_TX_0", "PRI_TDM_TX_0"},
 	{"MultiMedia20 Mixer", "PRI_TDM_TX_1", "PRI_TDM_TX_1"},
 	{"MultiMedia20 Mixer", "PRI_TDM_TX_2", "PRI_TDM_TX_2"},
@@ -16080,6 +17547,18 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"BE_OUT", NULL, "QUAT_TDM_RX_1"},
 	{"BE_OUT", NULL, "QUAT_TDM_RX_2"},
 	{"BE_OUT", NULL, "QUAT_TDM_RX_3"},
+	{"BE_OUT", NULL, "SEC_MI2S_RX_1"},
+	{"BE_OUT", NULL, "SEC_MI2S_RX_2"},
+	{"BE_OUT", NULL, "SEC_MI2S_RX_3"},
+	{"BE_OUT", NULL, "SEC_MI2S_RX_4"},
+	{"BE_OUT", NULL, "TERT_MI2S_RX_1"},
+	{"BE_OUT", NULL, "TERT_MI2S_RX_2"},
+	{"BE_OUT", NULL, "TERT_MI2S_RX_3"},
+	{"BE_OUT", NULL, "TERT_MI2S_RX_4"},
+	{"BE_OUT", NULL, "QUAT_MI2S_RX_1"},
+	{"BE_OUT", NULL, "QUAT_MI2S_RX_2"},
+	{"BE_OUT", NULL, "QUAT_MI2S_RX_3"},
+	{"BE_OUT", NULL, "QUAT_MI2S_RX_4"},
 
 	{"PRI_I2S_TX", NULL, "BE_IN"},
 	{"MI2S_TX", NULL, "BE_IN"},
@@ -16094,6 +17573,18 @@ static const struct snd_soc_dapm_route intercon[] = {
 	{"INT5_MI2S_TX", NULL, "BE_IN"},
 	{"SEC_MI2S_TX", NULL, "BE_IN"},
 	{"SENARY_MI2S_TX", NULL, "BE_IN" },
+	{"SEC_MI2S_TX_1", NULL, "BE_IN"},
+	{"SEC_MI2S_TX_2", NULL, "BE_IN"},
+	{"SEC_MI2S_TX_3", NULL, "BE_IN"},
+	{"SEC_MI2S_TX_4", NULL, "BE_IN"},
+	{"TERT_MI2S_TX_1", NULL, "BE_IN"},
+	{"TERT_MI2S_TX_2", NULL, "BE_IN"},
+	{"TERT_MI2S_TX_3", NULL, "BE_IN"},
+	{"TERT_MI2S_TX_4", NULL, "BE_IN"},
+	{"QUAT_MI2S_TX_1", NULL, "BE_IN"},
+	{"QUAT_MI2S_TX_2", NULL, "BE_IN"},
+	{"QUAT_MI2S_TX_3", NULL, "BE_IN"},
+	{"QUAT_MI2S_TX_4", NULL, "BE_IN"},
 	{"SLIMBUS_0_TX", NULL, "BE_IN" },
 	{"SLIMBUS_1_TX", NULL, "BE_IN" },
 	{"SLIMBUS_3_TX", NULL, "BE_IN" },
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h
index 531f83d752b0..bfeee4ad3607 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h
@@ -167,6 +167,34 @@
 #define LPASS_BE_INT5_MI2S_TX "INT5_MI2S_TX"
 #define LPASS_BE_INT6_MI2S_RX "INT6_MI2S_RX"
 #define LPASS_BE_INT6_MI2S_TX "INT6_MI2S_TX"
+
+#define LPASS_BE_SEC_MI2S_RX_1 "SEC_MI2S_RX_1"
+#define LPASS_BE_SEC_MI2S_RX_2 "SEC_MI2S_RX_2"
+#define LPASS_BE_SEC_MI2S_RX_3 "SEC_MI2S_RX_3"
+#define LPASS_BE_SEC_MI2S_RX_4 "SEC_MI2S_RX_4"
+#define LPASS_BE_SEC_MI2S_TX_1 "SEC_MI2S_TX_1"
+#define LPASS_BE_SEC_MI2S_TX_2 "SEC_MI2S_TX_2"
+#define LPASS_BE_SEC_MI2S_TX_3 "SEC_MI2S_TX_3"
+#define LPASS_BE_SEC_MI2S_TX_4 "SEC_MI2S_TX_4"
+
+#define LPASS_BE_TERT_MI2S_RX_1 "TERT_MI2S_RX_1"
+#define LPASS_BE_TERT_MI2S_RX_2 "TERT_MI2S_RX_2"
+#define LPASS_BE_TERT_MI2S_RX_3 "TERT_MI2S_RX_3"
+#define LPASS_BE_TERT_MI2S_RX_4 "TERT_MI2S_RX_4"
+#define LPASS_BE_TERT_MI2S_TX_1 "TERT_MI2S_TX_1"
+#define LPASS_BE_TERT_MI2S_TX_2 "TERT_MI2S_TX_2"
+#define LPASS_BE_TERT_MI2S_TX_3 "TERT_MI2S_TX_3"
+#define LPASS_BE_TERT_MI2S_TX_4 "TERT_MI2S_TX_4"
+
+#define LPASS_BE_QUAT_MI2S_RX_1 "QUAT_MI2S_RX_1"
+#define LPASS_BE_QUAT_MI2S_RX_2 "QUAT_MI2S_RX_2"
+#define LPASS_BE_QUAT_MI2S_RX_3 "QUAT_MI2S_RX_3"
+#define LPASS_BE_QUAT_MI2S_RX_4 "QUAT_MI2S_RX_4"
+#define LPASS_BE_QUAT_MI2S_TX_1 "QUAT_MI2S_TX_1"
+#define LPASS_BE_QUAT_MI2S_TX_2 "QUAT_MI2S_TX_2"
+#define LPASS_BE_QUAT_MI2S_TX_3 "QUAT_MI2S_TX_3"
+#define LPASS_BE_QUAT_MI2S_TX_4 "QUAT_MI2S_TX_4"
+
 /* For multimedia front-ends, asm session is allocated dynamically.
  * Hence, asm session/multimedia front-end mapping has to be maintained.
  * Due to this reason, additional multimedia front-end must be placed before
@@ -373,6 +401,30 @@ enum {
 	MSM_BACKEND_DAI_INT5_MI2S_TX,
 	MSM_BACKEND_DAI_INT6_MI2S_RX,
 	MSM_BACKEND_DAI_INT6_MI2S_TX,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_RX_1,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_RX_2,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_RX_3,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_RX_4,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_TX_1,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_TX_2,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_TX_3,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_TX_4,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_RX_1,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_RX_2,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_RX_3,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_RX_4,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_TX_1,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_TX_2,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_TX_3,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_TX_4,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_1,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_2,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_3,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_RX_4,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_1,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_2,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_3,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_TX_4,
 	MSM_BACKEND_DAI_MAX,
 };
 
diff --git a/sound/soc/msm/qdsp6v2/q6afe.c b/sound/soc/msm/qdsp6v2/q6afe.c
index 0524ca21feba..c7aecd5758d4 100644
--- a/sound/soc/msm/qdsp6v2/q6afe.c
+++ b/sound/soc/msm/qdsp6v2/q6afe.c
@@ -785,6 +785,18 @@ int afe_get_port_type(u16 port_id)
 	case AFE_PORT_ID_INT4_MI2S_RX:
 	case AFE_PORT_ID_INT5_MI2S_RX:
 	case AFE_PORT_ID_INT6_MI2S_RX:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
 		ret = MSM_AFE_PORT_TYPE_RX;
 		break;
 
@@ -856,6 +868,18 @@ int afe_get_port_type(u16 port_id)
 	case AFE_PORT_ID_INT4_MI2S_TX:
 	case AFE_PORT_ID_INT5_MI2S_TX:
 	case AFE_PORT_ID_INT6_MI2S_TX:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
 		ret = MSM_AFE_PORT_TYPE_TX;
 		break;
 
@@ -2734,6 +2758,118 @@ int afe_send_custom_tdm_header_cfg(
 	return ret;
 }
 
+int afe_i2s_port_start(u16 port_id, struct afe_i2s_port_config *i2s_port,
+		       u32 rate, u16 num_groups)
+{
+	struct param_hdr_v3 param_hdr = {0};
+	int index = 0;
+	uint16_t port_index = 0;
+	enum afe_mad_type mad_type = MAD_HW_NONE;
+	int ret = 0;
+
+	if (!i2s_port) {
+		pr_err("%s: Error, no configuration data\n", __func__);
+		return -EINVAL;
+	}
+
+	pr_debug("%s: port id: 0x%x\n", __func__, port_id);
+
+	index = q6audio_get_port_index(port_id);
+	if (index < 0 || index >= AFE_MAX_PORTS) {
+		pr_err("%s: AFE port index[%d] invalid!\n",
+				__func__, index);
+		return -EINVAL;
+	}
+	ret = q6audio_validate_port(port_id);
+	if (ret < 0) {
+		pr_err("%s: port id: 0x%x ret %d\n", __func__, port_id, ret);
+		return -EINVAL;
+	}
+
+	ret = afe_q6_interface_prepare();
+	if (ret != 0) {
+		pr_err("%s: Q6 interface prepare failed %d\n", __func__, ret);
+		return ret;
+	}
+
+	if ((index >= 0) && (index < AFE_MAX_PORTS)) {
+		this_afe.afe_sample_rates[index] = rate;
+
+		if (this_afe.rt_cb)
+			this_afe.dev_acdb_id[index] = this_afe.rt_cb(port_id);
+	}
+
+	/* Also send the topology id here if multiple ports: */
+	port_index = afe_get_port_index(port_id);
+	if (!(this_afe.afe_cal_mode[port_index] == AFE_CAL_MODE_NONE) &&
+	    num_groups > 1) {
+		/* One time call: only for first time */
+		afe_send_custom_topology();
+		afe_send_port_topology_id(port_id);
+		afe_send_cal(port_id);
+		afe_send_hw_delay(port_id, rate);
+	}
+
+	/* Start SW MAD module */
+	mad_type = afe_port_get_mad_type(port_id);
+	pr_debug("%s: port_id 0x%x, mad_type %d\n", __func__, port_id,
+		 mad_type);
+	if (mad_type != MAD_HW_NONE && mad_type != MAD_SW_AUDIO) {
+		if (!afe_has_config(AFE_CDC_REGISTERS_CONFIG) ||
+			!afe_has_config(AFE_SLIMBUS_SLAVE_CONFIG)) {
+			pr_err("%s: AFE isn't configured yet for\n"
+				"HW MAD try Again\n", __func__);
+			ret = -EAGAIN;
+			goto fail_cmd;
+		}
+		ret = afe_turn_onoff_hw_mad(mad_type, true);
+		if (ret) {
+			pr_err("%s: afe_turn_onoff_hw_mad failed %d\n",
+			       __func__, ret);
+			goto fail_cmd;
+		}
+	}
+
+	param_hdr.module_id = AFE_MODULE_AUDIO_DEV_INTERFACE;
+	param_hdr.instance_id = INSTANCE_ID_0;
+	param_hdr.param_id = AFE_PARAM_ID_I2S_CONFIG;
+	param_hdr.param_size = sizeof(struct afe_param_id_i2s_cfg);
+
+	ret = q6afe_pack_and_set_param_in_band(port_id,
+					       q6audio_get_port_index(port_id),
+					       param_hdr,
+					       (u8 *) &i2s_port->i2s_cfg);
+	if (ret) {
+		pr_err("%s: AFE enable for port 0x%x failed ret = %d\n",
+				__func__, port_id, ret);
+		goto fail_cmd;
+	}
+
+	port_index = afe_get_port_index(port_id);
+	if ((port_index >= 0) && (port_index < AFE_MAX_PORTS)) {
+		this_afe.afe_sample_rates[port_index] = rate;
+	} else {
+		pr_err("%s: Invalid port index %d\n", __func__, port_index);
+		ret = -EINVAL;
+		goto fail_cmd;
+	}
+	/* slot mapping is not need if there is only one group */
+	if (num_groups > 1) {
+		ret = afe_send_slot_mapping_cfg(
+				&i2s_port->slot_mapping,
+				port_id);
+		if (ret < 0) {
+			pr_err("%s: afe send failed %d\n", __func__, ret);
+			goto fail_cmd;
+		}
+	}
+
+	ret = afe_send_cmd_port_start(port_id);
+
+fail_cmd:
+	return ret;
+}
+
 int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port,
 		       u32 rate, u16 num_groups)
 {
@@ -3598,6 +3734,54 @@ int afe_get_port_index(u16 port_id)
 		return IDX_AFE_PORT_ID_INT6_MI2S_RX;
 	case AFE_PORT_ID_INT6_MI2S_TX:
 		return IDX_AFE_PORT_ID_INT6_MI2S_TX;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_4;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_4;
 	default:
 		pr_err("%s: port 0x%x\n", __func__, port_id);
 		return -EINVAL;
@@ -4022,6 +4206,154 @@ int afe_port_group_set_param(u16 group_id,
 	return ret;
 }
 
+static int afe_port_group_mi2s_set_param(u16 group_id,
+	struct afe_param_id_group_device_i2s_cfg_v1 *afe_group_config)
+{
+	struct param_hdr_v3 param_hdr = {0};
+	int cfg_type;
+	int ret;
+
+	if (!afe_group_config) {
+		pr_err("%s: Error, no configuration data\n", __func__);
+		return -EINVAL;
+	}
+
+	pr_debug("%s: group id: 0x%x\n", __func__, group_id);
+
+	ret = afe_q6_interface_prepare();
+	if (ret != 0) {
+		pr_err("%s: Q6 interface prepare failed %d\n", __func__, ret);
+		return ret;
+	}
+
+	switch (group_id) {
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX:
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX:
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX:
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX:
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX:
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_TX:
+		cfg_type = AFE_PARAM_ID_GROUP_DEVICE_I2S_CONFIG;
+		break;
+	default:
+		pr_err("%s: Invalid group id 0x%x\n", __func__, group_id);
+		return -EINVAL;
+	}
+
+	param_hdr.module_id = AFE_MODULE_GROUP_DEVICE;
+	param_hdr.instance_id = INSTANCE_ID_0;
+	param_hdr.param_id = cfg_type;
+	param_hdr.param_size =
+		sizeof(struct afe_param_id_group_device_i2s_cfg_v1);
+
+	ret = q6afe_svc_pack_and_set_param_in_band(IDX_GLOBAL_CFG, param_hdr,
+						   (u8 *) afe_group_config);
+	if (ret)
+		pr_err("%s: AFE_PARAM_ID_GROUP_DEVICE_CFG failed %d\n",
+			__func__, ret);
+
+	return ret;
+}
+
+static atomic_t mi2s_gp_en_ref[IDX_GROUP_MI2S_MAX];
+static int afe_get_mi2s_group_idx(u16 group_id)
+{
+	int gp_idx = -1;
+
+	switch (group_id) {
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX:
+		gp_idx = IDX_GROUP_SECONDARY_MI2S_RX;
+		break;
+	case AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX:
+		gp_idx = IDX_GROUP_SECONDARY_MI2S_TX;
+		break;
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX:
+		gp_idx = IDX_GROUP_TERTIARY_MI2S_RX;
+		break;
+	case AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX:
+		gp_idx = IDX_GROUP_TERTIARY_MI2S_TX;
+		break;
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX:
+		gp_idx = IDX_GROUP_QUATERNARY_MI2S_RX;
+		break;
+	case AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_TX:
+		gp_idx = IDX_GROUP_QUATERNARY_MI2S_TX;
+		break;
+	default:
+		break;
+	}
+
+	return gp_idx;
+}
+
+int afe_port_group_mi2s_enable(u16 group_id,
+	union afe_port_group_mi2s_config *afe_group_config,
+	u16 enable)
+{
+	struct afe_param_id_group_device_enable group_enable = {0};
+	struct param_hdr_v3 param_hdr = {0};
+	int ret = 0;
+	int gp_idx;
+
+	pr_debug("%s: group id: 0x%x enable: %d\n", __func__,
+		group_id, enable);
+
+	gp_idx = afe_get_mi2s_group_idx(group_id);
+
+	if ((gp_idx >= 0) && (gp_idx < IDX_GROUP_MI2S_MAX)) {
+
+		atomic_t *gp_ref = &mi2s_gp_en_ref[gp_idx];
+
+		if (enable)
+			atomic_inc(gp_ref);
+		else
+			atomic_dec(gp_ref);
+
+		if ((enable) && (atomic_read(gp_ref) > 1)) {
+			pr_err("%s: this TDM group is enabled already %d  refs_cnt %d\n",
+				__func__, group_id, atomic_read(gp_ref));
+			goto rtn;
+		}
+
+		if ((!enable) && (atomic_read(gp_ref) > 0)) {
+			pr_err("%s: this TDM group will be disabled in last call %d refs_cnt %d\n",
+				__func__, group_id, atomic_read(gp_ref));
+			goto rtn;
+		}
+	}
+
+	ret = afe_q6_interface_prepare();
+	if (ret != 0) {
+		pr_err("%s: Q6 interface prepare failed %d\n", __func__, ret);
+		return ret;
+	}
+
+	if (enable) {
+		ret = afe_port_group_mi2s_set_param(
+			group_id, &afe_group_config->i2s_cfg);
+		if (ret < 0) {
+			pr_err("%s: afe send failed %d\n", __func__, ret);
+			return ret;
+		}
+	}
+
+	param_hdr.module_id = AFE_MODULE_GROUP_DEVICE;
+	param_hdr.instance_id = INSTANCE_ID_0;
+	param_hdr.param_id = AFE_PARAM_ID_GROUP_DEVICE_ENABLE;
+	param_hdr.param_size = sizeof(struct afe_group_device_enable);
+	group_enable.group_id = group_id;
+	group_enable.enable = enable;
+
+	ret = q6afe_svc_pack_and_set_param_in_band(IDX_GLOBAL_CFG, param_hdr,
+						   (u8 *) &group_enable);
+	if (ret)
+		pr_err("%s: AFE_PARAM_ID_GROUP_DEVICE_ENABLE failed %d\n",
+			__func__, ret);
+
+rtn:
+	return ret;
+}
+
 int afe_port_group_enable(u16 group_id,
 	union afe_port_group_config *afe_group_config,
 	u16 enable)
diff --git a/sound/soc/msm/qdsp6v2/q6audio-v2.c b/sound/soc/msm/qdsp6v2/q6audio-v2.c
index 0062e4cd6432..94a6b0c42dee 100644
--- a/sound/soc/msm/qdsp6v2/q6audio-v2.c
+++ b/sound/soc/msm/qdsp6v2/q6audio-v2.c
@@ -95,6 +95,54 @@ int q6audio_get_port_index(u16 port_id)
 		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX;
 	case AFE_PORT_ID_TERTIARY_MI2S_TX:
 		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_4;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+		return IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+		return IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+		return IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_4;
 	case AUDIO_PORT_ID_I2S_RX:
 		return IDX_AUDIO_PORT_ID_I2S_RX;
 	case AFE_PORT_ID_SECONDARY_MI2S_RX_SD1:
@@ -342,6 +390,54 @@ int q6audio_get_port_id(u16 port_id)
 			     return AFE_PORT_ID_TERTIARY_MI2S_RX;
 	case AFE_PORT_ID_TERTIARY_MI2S_TX:
 			     return AFE_PORT_ID_TERTIARY_MI2S_TX;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+			     return AFE_PORT_ID_SECONDARY_MI2S_TX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+			     return AFE_PORT_ID_SECONDARY_MI2S_TX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+			     return AFE_PORT_ID_SECONDARY_MI2S_TX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+			     return AFE_PORT_ID_SECONDARY_MI2S_TX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+			     return AFE_PORT_ID_TERTIARY_MI2S_TX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+			     return AFE_PORT_ID_TERTIARY_MI2S_TX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+			     return AFE_PORT_ID_TERTIARY_MI2S_TX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+			     return AFE_PORT_ID_TERTIARY_MI2S_TX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_TX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_TX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_TX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_TX_4;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+			     return AFE_PORT_ID_SECONDARY_MI2S_RX_1;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+			     return AFE_PORT_ID_SECONDARY_MI2S_RX_2;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+			     return AFE_PORT_ID_SECONDARY_MI2S_RX_3;
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+			     return AFE_PORT_ID_SECONDARY_MI2S_RX_4;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+			     return AFE_PORT_ID_TERTIARY_MI2S_RX_1;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+			     return AFE_PORT_ID_TERTIARY_MI2S_RX_2;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+			     return AFE_PORT_ID_TERTIARY_MI2S_RX_3;
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+			     return AFE_PORT_ID_TERTIARY_MI2S_RX_4;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_RX_1;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_RX_2;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_RX_3;
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+			     return AFE_PORT_ID_QUATERNARY_MI2S_RX_4;
 	case AUDIO_PORT_ID_I2S_RX:
 			return AUDIO_PORT_ID_I2S_RX;
 	case AFE_PORT_ID_SECONDARY_MI2S_RX_SD1:
@@ -642,6 +738,30 @@ int q6audio_is_digital_pcm_interface(u16 port_id)
 	case AFE_PORT_ID_INT5_MI2S_TX:
 	case AFE_PORT_ID_INT6_MI2S_RX:
 	case AFE_PORT_ID_INT6_MI2S_TX:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
 		break;
 	default:
 		ret = -EINVAL;
@@ -795,6 +915,30 @@ int q6audio_validate_port(u16 port_id)
 	case AFE_PORT_ID_INT6_MI2S_RX:
 	case AFE_PORT_ID_INT6_MI2S_TX:
 	case AFE_PORT_ID_MULTICHAN_HDMI_RX:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_RX_4:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_1:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_2:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_3:
+	case AFE_PORT_ID_SECONDARY_MI2S_TX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_RX_4:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_1:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_2:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_3:
+	case AFE_PORT_ID_TERTIARY_MI2S_TX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_RX_4:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_1:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_2:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_3:
+	case AFE_PORT_ID_QUATERNARY_MI2S_TX_4:
 	{
 		ret = 0;
 		break;