diff options
author | Vineet Gupta <vgupta@synopsys.com> | 2014-06-25 17:14:03 +0530 |
---|---|---|
committer | Vineet Gupta <vgupta@synopsys.com> | 2014-07-23 11:17:12 +0530 |
commit | c9a98e1849a201ce88b42fc177b449df576a92b4 (patch) | |
tree | db1ca32678f84b0aa586f615aa43daf6dd56c906 | |
parent | 2b75c0f93e395aa6130c20a08016b143e6ec8c53 (diff) |
ARC: update some comments
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
-rw-r--r-- | arch/arc/kernel/time.c | 10 | ||||
-rw-r--r-- | arch/arc/mm/tlbex.S | 4 |
2 files changed, 9 insertions, 5 deletions
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c index f92cfb14ecd3..dbe74f418019 100644 --- a/arch/arc/kernel/time.c +++ b/arch/arc/kernel/time.c @@ -144,12 +144,12 @@ static struct clocksource arc_counter = { /********** Clock Event Device *********/ /* - * Arm the timer to interrupt after @limit cycles + * Arm the timer to interrupt after @cycles * The distinction for oneshot/periodic is done in arc_event_timer_ack() below */ -static void arc_timer_event_setup(unsigned int limit) +static void arc_timer_event_setup(unsigned int cycles) { - write_aux_reg(ARC_REG_TIMER0_LIMIT, limit); + write_aux_reg(ARC_REG_TIMER0_LIMIT, cycles); write_aux_reg(ARC_REG_TIMER0_CNT, 0); /* start from 0 */ write_aux_reg(ARC_REG_TIMER0_CTRL, TIMER_CTRL_IE | TIMER_CTRL_NH); @@ -168,6 +168,10 @@ static void arc_clkevent_set_mode(enum clock_event_mode mode, { switch (mode) { case CLOCK_EVT_MODE_PERIODIC: + /* + * At X Hz, 1 sec = 1000ms -> X cycles; + * 10ms -> X / 100 cycles + */ arc_timer_event_setup(arc_get_core_freq() / HZ); break; case CLOCK_EVT_MODE_ONESHOT: diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S index 79bfc81358c9..d572f1c2c724 100644 --- a/arch/arc/mm/tlbex.S +++ b/arch/arc/mm/tlbex.S @@ -220,9 +220,9 @@ ex_saved_reg1: .macro CONV_PTE_TO_TLB and r3, r0, PTE_BITS_RWX ; r w x - lsl r2, r3, 3 ; r w x 0 0 0 + lsl r2, r3, 3 ; r w x 0 0 0 (GLOBAL, kernel only) and.f 0, r0, _PAGE_GLOBAL - or.z r2, r2, r3 ; r w x r w x + or.z r2, r2, r3 ; r w x r w x (!GLOBAL, user page) and r3, r0, PTE_BITS_NON_RWX_IN_PD1 ; Extract PFN+cache bits from PTE or r3, r3, r2 |