diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2011-10-13 14:54:48 +0200 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2011-10-14 13:22:54 -0400 |
commit | d9d579842e9e10a49e1ba6a16be5ce2757d38cc0 (patch) | |
tree | 8303b9d27f3ea8afc484c16f61bf5ee2353260ae | |
parent | bff00256f1b2d762dea3d6c2c9dc85d453fa3e8f (diff) |
pata_via: add via_fixup()
* Fix via_init_one() to enable clock on 66 MHz devices
(bug introduced in commit 460f531 "pata_via: store UDMA masks
in via_isa_bridges table").
* Factor out common code from via_[re]init_one() to via_fixup().
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
-rw-r--r-- | drivers/ata/pata_via.c | 49 |
1 files changed, 23 insertions, 26 deletions
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c index 8e9f5048a10a..255f336cd7ea 100644 --- a/drivers/ata/pata_via.c +++ b/drivers/ata/pata_via.c @@ -509,6 +509,27 @@ static void via_config_fifo(struct pci_dev *pdev, unsigned int flags) } } +static void via_fixup(struct pci_dev *pdev, const struct via_isa_bridge *config) +{ + u32 timing; + + /* Initialise the FIFO for the enabled channels. */ + via_config_fifo(pdev, config->flags); + + if (config->udma_mask == ATA_UDMA4) { + /* The 66 MHz devices require we enable the clock */ + pci_read_config_dword(pdev, 0x50, &timing); + timing |= 0x80008; + pci_write_config_dword(pdev, 0x50, timing); + } + if (config->flags & VIA_BAD_CLK66) { + /* Disable the 66MHz clock on problem devices */ + pci_read_config_dword(pdev, 0x50, &timing); + timing &= ~0x80008; + pci_write_config_dword(pdev, 0x50, timing); + } +} + /** * via_init_one - discovery callback * @pdev: PCI device @@ -570,7 +591,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) struct pci_dev *isa; const struct via_isa_bridge *config; u8 enable; - u32 timing; unsigned long flags = id->driver_data; int rc; @@ -609,9 +629,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) return -ENODEV; } - /* Initialise the FIFO for the enabled channels. */ - via_config_fifo(pdev, config->flags); - /* Clock set up */ switch (config->udma_mask) { case 0x00: @@ -637,12 +654,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) return -ENODEV; } - if (config->flags & VIA_BAD_CLK66) { - /* Disable the 66MHz clock on problem devices */ - pci_read_config_dword(pdev, 0x50, &timing); - timing &= ~0x80008; - pci_write_config_dword(pdev, 0x50, timing); - } + via_fixup(pdev, config); /* We have established the device type, now fire it up */ return ata_pci_bmdma_init_one(pdev, ppi, &via_sht, (void *)config, 0); @@ -661,29 +673,14 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) static int via_reinit_one(struct pci_dev *pdev) { - u32 timing; struct ata_host *host = dev_get_drvdata(&pdev->dev); - const struct via_isa_bridge *config = host->private_data; int rc; rc = ata_pci_device_do_resume(pdev); if (rc) return rc; - via_config_fifo(pdev, config->flags); - - if (config->udma_mask == ATA_UDMA4) { - /* The 66 MHz devices require we enable the clock */ - pci_read_config_dword(pdev, 0x50, &timing); - timing |= 0x80008; - pci_write_config_dword(pdev, 0x50, timing); - } - if (config->flags & VIA_BAD_CLK66) { - /* Disable the 66MHz clock on problem devices */ - pci_read_config_dword(pdev, 0x50, &timing); - timing &= ~0x80008; - pci_write_config_dword(pdev, 0x50, timing); - } + via_fixup(pdev, host->private_data); ata_host_resume(host); return 0; |