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authorYan He <yanhe@codeaurora.org>2015-12-15 11:24:46 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 21:15:53 -0700
commit132a036c4d9eb928ac60aa2f25574af8848cd1dc (patch)
tree6c41b0d8c602f450981d2ff219bd53021902c1e1 /Documentation/devicetree/bindings/pci
parent73c35b895767327b722e9d9c952113af35c9d52d (diff)
msm: ep_pcie: add the support of MDM2AP GPIO
Add the support of MDM2AP GPIO so that MDM can notify AP about updated status. Change-Id: Ia5a020898d4d04dcd4fec6b3928aba380663ac56 Signed-off-by: Yan He <yanhe@codeaurora.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci')
-rw-r--r--Documentation/devicetree/bindings/pci/msm_ep_pcie.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt
index a9803fa850c9..caaf2d6e321c 100644
--- a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt
+++ b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt
@@ -45,6 +45,7 @@ Optional Properties:
- qcom,pcie-active-config: boolean type; active configuration of PCIe
addressing.
- qcom,pcie-aggregated-irq: boolean type; interrupts are aggregated.
+ - mdm2apstatus-gpio: GPIO used by PCIe endpoint side to notify the host side.
- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
below optional properties:
- qcom,msm-bus,name
@@ -83,6 +84,7 @@ Example:
perst-gpio = <&msmgpio 65 0>;
wake-gpio = <&msmgpio 61 0>;
clkreq-gpio = <&msmgpio 64 0>;
+ mdm2apstatus-gpio = <&tlmm_pinmux 16 0>;
gdsc-vdd-supply = <&gdsc_pcie_0>;
vreg-1.8-supply = <&pmd9635_l8>;
@@ -108,4 +110,4 @@ Example:
qcom,pcie-link-speed = <1>;
qcom,pcie-active-config;
qcom,pcie-aggregated-irq;
- }; \ No newline at end of file
+ };