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authorLaxman Dewangan <ldewangan@nvidia.com>2012-01-09 20:05:11 +0000
committerOlof Johansson <olof@lixom.net>2012-02-06 18:24:59 -0800
commitcb3732d0dc9df198c889a26210b6b27bc51a1c4a (patch)
treeb95a5a952d14897c093d09af778dcafa39cf756e /Documentation/magic-number.txt
parent941b8db1df8bfc29a88fc8e3e203289d84a3f64d (diff)
ARM: tegra: Pause DMA when reading transfer count
In order to read an accurate channel transfer count from the APB DMA engine, the DMA controller must be paused first. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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