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authorMark Brown <broonie@linaro.org>2013-09-01 13:49:07 +0100
committerMark Brown <broonie@linaro.org>2013-09-01 13:49:07 +0100
commit278ac33bbd8b3ff70f9518665c892c1b6f5625b7 (patch)
tree5a5a1e6d7ae2d4105774c55d9c5cd0ee25bd6ce1 /Documentation
parent85cac431329bd09f7d30d489591d7af0d658b008 (diff)
parenta110f93d8b4672c4ad18d911f62b9e861010e83b (diff)
Merge remote-tracking branch 'spi/topic/quad' into spi-next
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/spi/spi-bus.txt10
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt
index 296015e3c632..800dafe5b01b 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -55,6 +55,16 @@ contain the following properties.
chip select active high
- spi-3wire - (optional) Empty property indicating device requires
3-wire mode.
+- spi-tx-bus-width - (optional) The bus width(number of data wires) that
+ used for MOSI. Defaults to 1 if not present.
+- spi-rx-bus-width - (optional) The bus width(number of data wires) that
+ used for MISO. Defaults to 1 if not present.
+
+Some SPI controllers and devices support Dual and Quad SPI transfer mode.
+It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
+Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
+only 1(SINGLE), 2(DUAL) and 4(QUAD).
+Dual/Quad mode is not allowed when 3-wire mode is used.
If a gpio chipselect is used for the SPI slave the gpio number will be passed
via the cs_gpio