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authorJaiju Yesudasan <cjaijuy@codeaurora.org>2016-10-02 19:52:43 +0530
committerJaiju Yesudasan <cjaijuy@codeaurora.org>2017-05-10 09:17:41 +0530
commit3224a1ca55cab976e9151a02e9675ef7f76609ac (patch)
tree14de071028e6fb554be798eef1c4043cc7a3e257 /Documentation
parent3d82d66409abb91539bcb9d1f343fcb9d583f2b4 (diff)
ARM: dts: msm: Add support for multiple neutrino on msm8996
Add new nodes for multiple neutrino interfaces. This is for differentiating multiple neutrino interfaces connected to different RC. CRs-Fixed: 1060701 Change-Id: I6f9f7c050d5736fdf3e6bf45257ae410b7190c3b Signed-off-by: Jaiju Yesudasan <cjaijuy@codeaurora.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/net/neutrino_avb.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/neutrino_avb.txt b/Documentation/devicetree/bindings/net/neutrino_avb.txt
index 46c6a5208eba..471d59f2a3c0 100644
--- a/Documentation/devicetree/bindings/net/neutrino_avb.txt
+++ b/Documentation/devicetree/bindings/net/neutrino_avb.txt
@@ -2,6 +2,11 @@
This driver implements Ethernet driver for Neutrino ethernet controller
Required properties:
- compatible: Should be "qcom,ntn_avb"
+ - ntn-rst-delay-msec: delay (msec) required after PCIe reset for stabilization
+ - ntn-rc-num: PCIe root complex number on which Neutrino is connected
+
+Optional properties:
+ - ntn-bus-num: PCIe bus number on which Neutrino is connected
- ntn-rst-gpio: Neutrino reset GPIO
- vdd-ntn-hsic-supply: neutrino HSIC power supply
- vdd-ntn-pci-supply: PCIe core power supply
@@ -25,4 +30,5 @@ Example:
pinctrl-0 = <&ntn_default>;
qcom,ntn-rst-delay-msec = <100>;
qcom,ntn-rc-num = <1>;
+ qcom,ntn-bus-num = <1>;
};