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author | Linux Build Service Account <lnxbuild@localhost> | 2016-10-07 12:20:00 -0700 |
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committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-10-07 12:20:00 -0700 |
commit | 44fc68eb8633a8ca21a49bfc62c48e7a43a9d1ad (patch) | |
tree | 2342e5b87b5b4e1ec6f2852d05e3ba6ff5421d51 /Documentation | |
parent | 3c7400dc73db9b1455032e8d6e7679f27869cd75 (diff) | |
parent | 5f86ca3e754b658d93bd7fa0bbb6003f90b0751e (diff) |
Merge "clk: qcom: Add support for GPU clocks for MSMFalcon"
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,gpucc.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.txt b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt new file mode 100644 index 000000000000..9f8ea0d6ef8f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt @@ -0,0 +1,23 @@ +Qualcomm Technologies, Inc Graphics Clock & Reset Controller Binding +-------------------------------------------------------------------- + +Required properties : +- compatible : shall contain only one of the following: + + "qcom,gpucc-msmfalcon" + +- reg : shall contain base register location and length +- #clock-cells : shall contain 1 +- #reset-cells : shall contain 1 + +Optional properties : +- #power-domain-cells : shall contain 1 + +Example: + clock-controller@4000000 { + compatible = "qcom,gpucc-msmfalcon"; + reg = <<0x5065000 0x10000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; |