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authorMayank Rana <mrana@codeaurora.org>2016-03-16 21:28:44 -0700
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 21:25:04 -0700
commit630949aeae52940a14a1ea4cc635a7b8f8e0d710 (patch)
tree996c519586aaaedd083983822361e9f5df0e567f /Documentation
parent38db6db1afbd9fbb253396c58c3891ee7f0a207f (diff)
usb: phy: qusb: Add support to get phy_clk_scheme
This change adds qcom,phy-clk-scheme mandatory property with QUSB PHY driver. qcom,phy-clk-scheme property must have "cml" (i.e. DIFF clock scheme) or "cmos" (i.e. SE clock scheme). Based on this input qusb phy driver uses required reset and initialization sequence. Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/usb/msm-phy.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/msm-phy.txt b/Documentation/devicetree/bindings/usb/msm-phy.txt
index ae34d7b6cbdb..e7ec455a64c8 100644
--- a/Documentation/devicetree/bindings/usb/msm-phy.txt
+++ b/Documentation/devicetree/bindings/usb/msm-phy.txt
@@ -152,6 +152,7 @@ Required properties:
- clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
property. Required clocks are "cfg_ahb_clk" and "phy_reset".
- phy_type: Should be one of "ulpi" or "utmi". ChipIdea core uses "ulpi" mode.
+ - qcom,phy-clk-scheme: Should be one of "cml" or "cmos".
Optional properties:
- reg: Address and length register set to control QUSB2 PHY