diff options
| author | Tanya Dixit <tdixit@codeaurora.org> | 2016-12-08 22:25:56 +0530 |
|---|---|---|
| committer | Laxminath Kasam <lkasam@codeaurora.org> | 2017-01-03 11:40:26 +0530 |
| commit | bc6d0c8cddc06d4c78f2d08cc6037c4bbd629a64 (patch) | |
| tree | c7464285cb90c53edec312330837800d0f3b5399 /Documentation | |
| parent | 03e601544bb1e7ae64e64134f29d1265945e6b30 (diff) | |
ASoC: msm: Changes in machine driver to enable mclk
Provide the support to enable MCLK output to external
audio connections. Also, update configuration to set
bit clock as EBIT in slave mode.
CRs-Fixed: 1094763
Change-Id: If07f31a6c37c7b8b23eb74b25a1e15990043cb92
Signed-off-by: Tanya Dixit <tdixit@codeaurora.org>
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/sound/qcom-audio-dev.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt index f71d1a909d07..e8177c3a0952 100644 --- a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt +++ b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt @@ -1772,6 +1772,10 @@ Optional Properties: - qcom,msm-mi2s-master: This property is used to inform machine driver if MSM is the clock master of mi2s. 1 means master and 0 means slave. The first entry is primary mi2s; the second entry is secondary mi2s, and so on. +- qcom,msm-mi2s-ext-mclk: This property is used to inform machine driver + if MCLK from MSM is used for any external audio connections. 1 means used + as external mclk source and 0 indicate not used. The first entry is + primary mclk; the second entry is secondary mclk, and so on. - reg: This property provides the AUX PCM/MI2S mux select register addresses and size. - reg_names: This property provides the name of the AUX PCM/MI2S mux select @@ -1812,6 +1816,7 @@ Example: qcom,mi2s-audio-intf; qcom,auxpcm-audio-intf; qcom,msm-mi2s-master = <1>, <0>, <1>, <1>; + qcom,msm-mi2s-ext-mclk = <1>, <1>, <0>, <1>; reg = <0x1711a000 0x4>, <0x1711b000 0x4>, <0x1711c000 0x4>, |