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| author | Prakash Kamliya <pkamliya@codeaurora.org> | 2016-01-22 10:59:20 +0530 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 21:19:35 -0700 |
| commit | f087bb3d9ae69ccd2396929e397e9b7989eaeb6e (patch) | |
| tree | dd45087629c85fc9b2b880fc70ea978bbec967fe /Documentation | |
| parent | 9b63383c0ab6d0eb1b90921d3ac4060b644c4a73 (diff) | |
msm: kgsl: Avoid L2PC on masked CPUs
If any of the Graphics rendering threads are running
on masked CPUs, avoid L2PC for some duration on that
CPU. This reduces latency on CPU (latency mainly
because of L2 cache flush) and helps on performance.
This change uses pm_qos_update_request_timeout() API.
Add l2pc-cpu-mask property in device tree to enable
this.
CRs-Fixed: 962598
Change-Id: If90090cd2c68ea7c07e269723931fef7201ef136
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/gpu/adreno.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/adreno.txt b/Documentation/devicetree/bindings/gpu/adreno.txt index 3bbda5962036..3861f5c285ee 100644 --- a/Documentation/devicetree/bindings/gpu/adreno.txt +++ b/Documentation/devicetree/bindings/gpu/adreno.txt @@ -110,6 +110,11 @@ Optional Properties: Signal the GPU to set Set TWOPASSUSEWFI bit in A5XX_PC_DBG_ECO_CNTL (5XX only) +- qcom,l2pc-cpu-mask: + Disables L2PC on masked CPUs when any of Graphics + rendering thread is running on masked CPUs. + Bit 0 is for CPU-0, bit 1 is for CPU-1... + The following properties are optional as collecting data via coresight might not be supported for every chipset. The documentation for coresight properties can be found in: |