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authorRunmin Wang <runminw@codeaurora.org>2016-03-29 16:32:39 -0700
committerJeevan Shriram <jshriram@codeaurora.org>2016-04-18 17:26:48 -0700
commitf15492d20c2c93636cee175bde321ef229ad45be (patch)
tree8e2d76507ea78bd52ccaca574b54c166b9f0f4e8 /Documentation
parent5dca066217e07c7828d298d3254e5f6919f5dee0 (diff)
soc: qcom: Add support for gladiator error reporting v2
Add support for gladiator cache inter connect error detection and reporting for msmcobalt CRs-Fixed: 1000642 Change-Id: I68c5ce09cc77a19eb334a1d8ccce8d577f964316 Signed-off-by: Runmin Wang <runminw@codeaurora.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/cache/msm_gladiator_erp_v2.txt20
1 files changed, 20 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/cache/msm_gladiator_erp_v2.txt b/Documentation/devicetree/bindings/cache/msm_gladiator_erp_v2.txt
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+++ b/Documentation/devicetree/bindings/cache/msm_gladiator_erp_v2.txt
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+* MSM Gladiator error reporting driver
+
+Required properties:
+- compatible: Should be "qcom,msm-gladiator-v2"
+- reg: I/O address Gladiator H/W block
+- reg-names: Should be "gladiator_base"
+- interrupts: Should contain the gladiator error interrupt number
+- clock-names: Should be "atb_clk"
+- clocks: Handles to clocks specified in "clock-names" property.
+
+Example:
+
+qcom,msm-gladiator-v2@b1c0000 {
+ compatible = "qcom,msm-gladiator-v2";
+ reg = <0xb1c0000 0xe000>;
+ reg-names = "gladiator_base";
+ interrupts = <0 34 0>;
+ clock-names = "atb_clk";
+ clocks = <&clock_gcc clk_qdss_clk>;
+}