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authorYan He <yanhe@codeaurora.org>2016-02-10 22:38:38 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-22 11:08:35 -0700
commitf46f720b224138e47fe9649b1bade8e3ab7af61b (patch)
tree2582682ffc78efd88f3d07fdcd70128412506584 /Documentation
parentb68798fafa4ee121b3f6ce13a3a7ef92b6e960a6 (diff)
platform: msm: Add snapshot of the SPS/BAM driver
Add the MSM SPS (Smart Peripheral Switch) driver. SPS may be used as a DMA engine to move data in either Peripheral-to- Peripheral (a.k.a. BAM-to-BAM) mode or Peripheral-to-Memory (a.k.a BAM-System) mode. This snapshot is taken as of msm-3.18 commit 132e1315c1 Change-Id: I7ec9781c3b608b9ee0fffdf7ba3e1b33bfa4dfcd Signed-off-by: Yan He <yanhe@codeaurora.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/dma/sps/sps.txt47
1 files changed, 47 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/sps/sps.txt b/Documentation/devicetree/bindings/dma/sps/sps.txt
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+SPS (Smart Peripheral Switch) may be used as a DMA engine to move data
+in either the Peripheral-to-Peripheral (a.k.a. BAM-to-BAM) mode or the
+Peripheral-to-Memory (a.k.a. BAM-System) mode. SPS includes BAM (Bus
+Access Module) hardware block, BAM DMA peripheral, and pipe memory.
+
+Required property:
+ - compatible: should be "qcom,msm_sps" or "qcom,msm_sps_4k"
+
+Optional properties:
+ - reg: offset and size for the memory mapping, including maps for
+ BAM DMA BAM, BAM DMA peripheral, pipe memory and reserved memory.
+ - reg-names: indicates various resources passed to driver (via reg
+ property) by name. "reg-names" examples are "bam_mem", "core_mem"
+ , "pipe_mem" and "res_mem".
+ - interrupts: IRQ line
+ - qcom,device-type: specify the device configuration of BAM DMA and
+ pipe memory. Can be one of
+ 1 - With BAM DMA and without pipe memory
+ 2 - With BAM DMA and with pipe memory
+ 3 - Without BAM DMA and without pipe memory
+ - qcom,pipe-attr-ee: BAM pipes are attributed to a specific EE, with
+ which we can know the pipes belong to apps side and can have the
+ error interrupts at the pipe level.
+ - clocks: This property shall provide a list of entries each of which
+ contains a phandle to clock controller device and a macro that is
+ the clock's name in hardware.These should be "clock_rpm" as clock
+ controller phandle and "clk_pnoc_sps_clk" as macro for "dfab_clk"
+ and "clock_gcc" as clock controller phandle and "clk_gcc_bam_dma_ahb_clk"
+ as macro for "dma_bam_pclk".
+ - clock-names: This property shall contain the clock input names used
+ by driver in same order as the clocks property.These should be "dfab_clk"
+ and "dma_bam_pclk".
+
+Example:
+
+ qcom,sps@f9980000 {
+ compatible = "qcom,msm_sps";
+ reg = <0xf9984000 0x15000>,
+ <0xf9999000 0xb000>,
+ <0xfe803000 0x4800>;
+ interrupts = <0 94 0>;
+ qcom,device-type = <2>;
+ qcom,pipe-attr-ee;
+ clocks = <&clock_rpm clk_pnoc_sps_clk>,
+ <&clock_gcc clk_gcc_bam_dma_ahb_clk>;
+ clock-names = "dfab_clk", "dma_bam_pclk";
+ };