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authorPaul Walmsley <paul@pwsan.com>2012-04-04 10:20:15 -0600
committerPaul Walmsley <paul@pwsan.com>2012-04-04 14:52:49 -0600
commit5897a391d41d42f19285376a4ad1320d452c2946 (patch)
tree2993e798fb145cc02447376babe826d7a4768613 /arch/arm/mach-omap2
parent6c4a057bffe9823221eab547e11fac181dc18a2b (diff)
ARM: OMAP3: clock data: fill in some missing clockdomains
Several clocks are missing clockdomains. This can cause problems with the hwmod and power management code. Fill these in. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Matt Porter <mporter@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index f3a9a4a0aa04..f4a626f7c79e 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -1394,6 +1394,7 @@ static struct clk cpefuse_fck = {
.name = "cpefuse_fck",
.ops = &clkops_omap2_dflt,
.parent = &sys_ck,
+ .clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
.enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT,
.recalc = &followparent_recalc,
@@ -1403,6 +1404,7 @@ static struct clk ts_fck = {
.name = "ts_fck",
.ops = &clkops_omap2_dflt,
.parent = &omap_32k_fck,
+ .clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
.enable_bit = OMAP3430ES2_EN_TS_SHIFT,
.recalc = &followparent_recalc,
@@ -1412,6 +1414,7 @@ static struct clk usbtll_fck = {
.name = "usbtll_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll5_m2_ck,
+ .clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
.enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
.recalc = &followparent_recalc,
@@ -1617,6 +1620,7 @@ static struct clk fshostusb_fck = {
.name = "fshostusb_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &core_48m_fck,
+ .clkdm_name = "core_l4_clkdm",
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
.recalc = &followparent_recalc,
@@ -2043,6 +2047,7 @@ static struct clk omapctrl_ick = {
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT,
.flags = ENABLE_ON_INIT,
+ .clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@@ -2094,6 +2099,7 @@ static struct clk usb_l4_ick = {
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK,
.clksel = usb_l4_clksel,
+ .clkdm_name = "core_l4_clkdm",
.recalc = &omap2_clksel_recalc,
};