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authorStephen Warren <swarren@nvidia.com>2013-08-20 15:17:35 -0600
committerStephen Warren <swarren@nvidia.com>2013-09-17 13:42:17 -0600
commitd2207071b3c74b144a860cbe6a46496a44963972 (patch)
tree957a2815fe853c85d16e4722c655ce148f16c373 /arch/arm/mach-tegra/pmc.c
parent272b98c6455f00884f0350f775c5342358ebb73f (diff)
ARM: tegra: split tegra_pmc_init() in two
Tegra's board file currently initializes clocks much earlier than those for most other ARM SoCs. The reason is: * The PMC HW block is involved in the path of some interrupts (i.e. it inverts, or not, the IRQ input pin dedicated to the PMIC). * So, that part of the PMC must be initialized early so that the IRQ polarity is correct. * The PMC initialization is currently monolithic, and the PMC has some clock inputs, so the init routine ends up calling of_clk_get_by_name(), and hence clocks must be set up early too. In order to defer clock initialization to the more typical location, split out the portions of tegra_pmc_init() that are truly IRQ-related into a separate tegra_pmc_init_irq(), which can be called from the machine descriptor's .init_irq() function, and defer the rest until the machine descriptor's .init_machine() function. This allows the clock initiliazation to happen from the machine descriptor's .init_time() function, as is typical. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pmc.c')
-rw-r--r--arch/arm/mach-tegra/pmc.c41
1 files changed, 22 insertions, 19 deletions
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index 8acb881f7cfe..7916ff91f969 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -285,13 +285,10 @@ static const struct of_device_id matches[] __initconst = {
{ }
};
-static void __init tegra_pmc_parse_dt(void)
+void __init tegra_pmc_init_irq(void)
{
struct device_node *np;
- u32 prop;
- enum tegra_suspend_mode suspend_mode;
- u32 core_good_time[2] = {0, 0};
- u32 lp0_vec[2] = {0, 0};
+ u32 val;
np = of_find_matching_node(NULL, matches);
BUG_ON(!np);
@@ -300,6 +297,26 @@ static void __init tegra_pmc_parse_dt(void)
tegra_pmc_invert_interrupt = of_property_read_bool(np,
"nvidia,invert-interrupt");
+
+ val = tegra_pmc_readl(PMC_CTRL);
+ if (tegra_pmc_invert_interrupt)
+ val |= PMC_CTRL_INTR_LOW;
+ else
+ val &= ~PMC_CTRL_INTR_LOW;
+ tegra_pmc_writel(val, PMC_CTRL);
+}
+
+void __init tegra_pmc_init(void)
+{
+ struct device_node *np;
+ u32 prop;
+ enum tegra_suspend_mode suspend_mode;
+ u32 core_good_time[2] = {0, 0};
+ u32 lp0_vec[2] = {0, 0};
+
+ np = of_find_matching_node(NULL, matches);
+ BUG_ON(!np);
+
tegra_pclk = of_clk_get_by_name(np, "pclk");
WARN_ON(IS_ERR(tegra_pclk));
@@ -365,17 +382,3 @@ static void __init tegra_pmc_parse_dt(void)
pmc_pm_data.suspend_mode = suspend_mode;
}
-
-void __init tegra_pmc_init(void)
-{
- u32 val;
-
- tegra_pmc_parse_dt();
-
- val = tegra_pmc_readl(PMC_CTRL);
- if (tegra_pmc_invert_interrupt)
- val |= PMC_CTRL_INTR_LOW;
- else
- val &= ~PMC_CTRL_INTR_LOW;
- tegra_pmc_writel(val, PMC_CTRL);
-}