summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra
diff options
context:
space:
mode:
authorDmitry Artamonow <mad_soft@inbox.ru>2012-03-13 09:46:27 +0400
committerOlof Johansson <olof@lixom.net>2012-03-18 10:26:48 -0700
commit2f926eecdfb6138fef91683667fc915af5071fff (patch)
tree198b1187e300c825319153dc288aa6eda538f822 /arch/arm/mach-tegra
parent795d5fd4b8b06944976c95e8592e17e2d415aa81 (diff)
arm/tegra: pcie: fix return value of function
In previous patch (arm/tegra: add timeout to PCIe PLL lock detection loop) tegra_pcie_enable_controller() function type has been changed from void to int, but the last return statement wasn't converted, so function returns undefined value. Fix it. Also while at it, address couple of minor concerns raised by reviewers: use usleep_range for delay, and lower the value of timeout to 300ms to be consistent with Nvidia Vibrante kernel. Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/pcie.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 0a1dec694394..91536996c3f0 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -639,10 +639,10 @@ static int tegra_pcie_enable_controller(void)
pads_writel(0xfa5cfa5c, 0xc8);
/* Wait for the PLL to lock */
- timeout = 2000;
+ timeout = 300;
do {
val = pads_readl(PADS_PLL_CTL);
- mdelay(1);
+ usleep_range(1000, 1000);
if (--timeout == 0) {
pr_err("Tegra PCIe error: timeout waiting for PLL\n");
return -EBUSY;
@@ -677,7 +677,7 @@ static int tegra_pcie_enable_controller(void)
/* Disable all execptions */
afi_writel(0, AFI_FPCI_ERROR_MASKS);
- return;
+ return 0;
}
static void tegra_pcie_xclk_clamp(bool clamp)