diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2014-07-26 12:01:10 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-07-26 12:01:27 +0200 |
| commit | 96bda115ec552ff75319f85828f6c333d101b401 (patch) | |
| tree | e30895f65413fdf8fd91c026faad1a3fb54b0653 /arch/arm/plat-samsung | |
| parent | 8e5655cd4f7e140ceb24705f913406e9f56b7d54 (diff) | |
| parent | f1ff47454bb2fe0d5644f981679d1bea532816fd (diff) | |
Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim:
- support common clock framework for s5pv210 clock
- add generic PHY driver on s5pv210 to support it via DT
- add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards
- remove board files from mach-s5pv210 and unused codes
- enable multiplatform for s5pv210
* tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: samsung: s5pv210: Remove legacy board support
ARM: SAMSUNG: Remove remaining legacy code
gpio: samsung: Remove legacy support of S5PV210
ARM: S5PV210: Enable multi-platform build support
cpufreq: s5pv210: Make the driver multiplatform aware
ARM: S5PV210: Register cpufreq platform device
ARM: S5PV210: move debug-macro.S into the common space
ARM: S5PV210: Untie PM support from legacy code
ARM: S5PV210: Remove support for board files
ARM: dts: Add Device tree for s5pc110/s5pv210 boards
ARM: dts: Add Device tree for s5pv210 SoC
ARM: S5PV210: Add board file for boot using Device Tree
phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver
clk: samsung: Add S5PV210 Audio Subsystem clock driver
ARM: SAMSUNG: Remove legacy clock code
serial: samsung: Remove support for legacy clock code
cpufreq: s3c24xx: Remove some dead code
ARM: S5PV210: Migrate clock handling to Common Clock Framework
clk: samsung: Add clock driver for S5PV210 and compatible SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-samsung')
34 files changed, 14 insertions, 3418 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 1c629c2c270f..1091b0a3729a 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -6,30 +6,16 @@ config PLAT_SAMSUNG bool - depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P || ARCH_EXYNOS + depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210 default y select GENERIC_IRQ_CHIP select NO_IOPORT_MAP help Base platform code for all Samsung SoC based systems -config PLAT_S5P - bool - depends on ARCH_S5PV210 - default y - select ARCH_REQUIRE_GPIOLIB - select ARM_VIC - select NO_IOPORT_MAP - select PLAT_SAMSUNG - select S3C_GPIO_TRACK - select S5P_GPIO_DRVSTR - select SAMSUNG_CLKSRC if !COMMON_CLK - help - Base platform code for Samsung's S5P series SoC. - config SAMSUNG_PM bool - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || S5P_PM) + depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX) default y help Base platform power management code for samsung code @@ -65,48 +51,6 @@ config SAMSUNG_ATAGS if SAMSUNG_ATAGS -# clock options - -config SAMSUNG_CLOCK - bool - default y if !COMMON_CLK - -config SAMSUNG_CLKSRC - bool - help - Select the clock code for the clksrc implementation - used by newer systems such as the S3C64XX. - -config S5P_CLOCK - def_bool ARCH_S5PV210 - help - Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs - -# options for IRQ support - -config S5P_IRQ - def_bool ARCH_S5PV210 - help - Support common interrupt part for ARCH_S5P SoCs - -config S5P_EXT_INT - bool - help - Use the external interrupts (other than GPIO interrupts.) - -config S5P_GPIO_INT - bool - help - Common code for the GPIO interrupts (other than external interrupts.) - -# options for gpio configuration support - -config S5P_GPIO_DRVSTR - bool - help - Internal configuration to get and set correct GPIO driver strength - helper - config SAMSUNG_GPIO_EXTRA int "Number of additional GPIO pins" default 128 if SAMSUNG_GPIO_EXTRA128 @@ -138,12 +82,6 @@ config S3C_GPIO_TRACK Internal configuration option to enable the s3c specific gpio chip tracking if the platform requires it. -# uart options - -config S5P_DEV_UART - def_bool y - depends on ARCH_S5PV210 - # ADC driver config S3C_ADC @@ -301,66 +239,6 @@ config SAMSUNG_DEV_BACKLIGHT help Compile in platform device definition LCD backlight with PWM Timer -config S5P_DEV_CSIS0 - bool - help - Compile in platform device definitions for MIPI-CSIS channel 0 - -config S5P_DEV_CSIS1 - bool - help - Compile in platform device definitions for MIPI-CSIS channel 1 - -config S5P_DEV_FIMC0 - bool - help - Compile in platform device definitions for FIMC controller 0 - -config S5P_DEV_FIMC1 - bool - help - Compile in platform device definitions for FIMC controller 1 - -config S5P_DEV_FIMC2 - bool - help - Compile in platform device definitions for FIMC controller 2 - -config S5P_DEV_FIMC3 - bool - help - Compile in platform device definitions for FIMC controller 3 - -config S5P_DEV_FIMD0 - bool - help - Compile in platform device definitions for FIMD controller 0 - -config S5P_DEV_G2D - bool - help - Compile in platform device definitions for G2D device - -config S5P_DEV_I2C_HDMIPHY - bool - help - Compile in platform device definitions for I2C HDMIPHY controller - -config S5P_DEV_JPEG - bool - help - Compile in platform device definitions for JPEG codec - -config S5P_DEV_ONENAND - bool - help - Compile in platform device definition for OneNAND controller - -config S5P_DEV_TV - bool - help - Compile in platform device definition for TV interface - config S3C24XX_PWM bool "PWM device support" select PWM @@ -381,12 +259,6 @@ config S3C_DMA help Internal configuration for S3C DMA core -config S5P_IRQ_PM - bool - default y if S5P_PM - help - Legacy IRQ power management for S5P platforms - config SAMSUNG_PM_GPIO bool default y if GPIO_SAMSUNG && PM @@ -469,17 +341,6 @@ config SAMSUNG_WDT_RESET Compile support for system restart by triggering watchdog reset. Used on SoCs that do not provide dedicated reset control. -config S5P_PM - bool - help - Common code for power management support on S5P and newer SoCs - -config S5P_SLEEP - bool - help - Internal config node to apply common S5P sleep management code. - Can be selected by S5P and newer SoCs with similar sleep procedure. - config DEBUG_S3C_UART depends on PLAT_SAMSUNG int diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 5e5beaa9ae15..5fe175017f07 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -5,7 +5,6 @@ # Licensed under GPLv2 ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include -ccflags-$(CONFIG_ARCH_EXYNOS) += -I$(srctree)/arch/arm/mach-exynos/include obj-y := obj-m := @@ -16,15 +15,6 @@ obj- := obj-y += init.o cpu.o -obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o - -obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o -obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o - -obj-$(CONFIG_S5P_IRQ) += s5p-irq.o -obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o -obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o - # ADC obj-$(CONFIG_S3C_ADC) += adc.o @@ -36,7 +26,6 @@ obj-$(CONFIG_SAMSUNG_ATAGS) += platformdata.o obj-$(CONFIG_SAMSUNG_ATAGS) += devs.o obj-$(CONFIG_SAMSUNG_ATAGS) += dev-uart.o obj-$(CONFIG_S5P_DEV_MFC) += s5p-dev-mfc.o -obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o @@ -58,7 +47,3 @@ obj-$(CONFIG_SAMSUNG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o - -obj-$(CONFIG_S5P_PM) += s5p-pm.o -obj-$(CONFIG_S5P_IRQ_PM) += s5p-irq-pm.o -obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c deleted file mode 100644 index 786a4107a157..000000000000 --- a/arch/arm/plat-samsung/clock-clksrc.c +++ /dev/null @@ -1,212 +0,0 @@ -/* linux/arch/arm/plat-samsung/clock-clksrc.c - * - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <plat/clock.h> -#include <plat/clock-clksrc.h> -#include <plat/cpu-freq.h> - -static inline struct clksrc_clk *to_clksrc(struct clk *clk) -{ - return container_of(clk, struct clksrc_clk, clk); -} - -static inline u32 bit_mask(u32 shift, u32 nr_bits) -{ - u32 mask = 0xffffffff >> (32 - nr_bits); - - return mask << shift; -} - -static unsigned long s3c_getrate_clksrc(struct clk *clk) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - unsigned long rate = clk_get_rate(clk->parent); - u32 clkdiv = __raw_readl(sclk->reg_div.reg); - u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size); - - clkdiv &= mask; - clkdiv >>= sclk->reg_div.shift; - clkdiv++; - - rate /= clkdiv; - return rate; -} - -static int s3c_setrate_clksrc(struct clk *clk, unsigned long rate) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - void __iomem *reg = sclk->reg_div.reg; - unsigned int div; - u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size); - u32 val; - - rate = clk_round_rate(clk, rate); - div = clk_get_rate(clk->parent) / rate; - if (div > (1 << sclk->reg_div.size)) - return -EINVAL; - - val = __raw_readl(reg); - val &= ~mask; - val |= (div - 1) << sclk->reg_div.shift; - __raw_writel(val, reg); - - return 0; -} - -static int s3c_setparent_clksrc(struct clk *clk, struct clk *parent) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - struct clksrc_sources *srcs = sclk->sources; - u32 clksrc = __raw_readl(sclk->reg_src.reg); - u32 mask = bit_mask(sclk->reg_src.shift, sclk->reg_src.size); - int src_nr = -1; - int ptr; - - for (ptr = 0; ptr < srcs->nr_sources; ptr++) - if (srcs->sources[ptr] == parent) { - src_nr = ptr; - break; - } - - if (src_nr >= 0) { - clk->parent = parent; - - clksrc &= ~mask; - clksrc |= src_nr << sclk->reg_src.shift; - - __raw_writel(clksrc, sclk->reg_src.reg); - return 0; - } - - return -EINVAL; -} - -static unsigned long s3c_roundrate_clksrc(struct clk *clk, - unsigned long rate) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - unsigned long parent_rate = clk_get_rate(clk->parent); - int max_div = 1 << sclk->reg_div.size; - int div; - - if (rate >= parent_rate) - rate = parent_rate; - else { - div = parent_rate / rate; - if (parent_rate % rate) - div++; - - if (div == 0) - div = 1; - if (div > max_div) - div = max_div; - - rate = parent_rate / div; - } - - return rate; -} - -/* Clock initialisation code */ - -void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk, bool announce) -{ - struct clksrc_sources *srcs = clk->sources; - u32 mask = bit_mask(clk->reg_src.shift, clk->reg_src.size); - u32 clksrc; - - if (!clk->reg_src.reg) { - if (!clk->clk.parent) - printk(KERN_ERR "%s: no parent clock specified\n", - clk->clk.name); - return; - } - - clksrc = __raw_readl(clk->reg_src.reg); - clksrc &= mask; - clksrc >>= clk->reg_src.shift; - - if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) { - printk(KERN_ERR "%s: bad source %d\n", - clk->clk.name, clksrc); - return; - } - - clk->clk.parent = srcs->sources[clksrc]; - - if (announce) - printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n", - clk->clk.name, clk->clk.parent->name, clksrc, - clk_get_rate(&clk->clk)); -} - -static struct clk_ops clksrc_ops = { - .set_parent = s3c_setparent_clksrc, - .get_rate = s3c_getrate_clksrc, - .set_rate = s3c_setrate_clksrc, - .round_rate = s3c_roundrate_clksrc, -}; - -static struct clk_ops clksrc_ops_nodiv = { - .set_parent = s3c_setparent_clksrc, -}; - -static struct clk_ops clksrc_ops_nosrc = { - .get_rate = s3c_getrate_clksrc, - .set_rate = s3c_setrate_clksrc, - .round_rate = s3c_roundrate_clksrc, -}; - -void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size) -{ - int ret; - - for (; size > 0; size--, clksrc++) { - if (!clksrc->reg_div.reg && !clksrc->reg_src.reg) - printk(KERN_ERR "%s: clock %s has no registers set\n", - __func__, clksrc->clk.name); - - /* fill in the default functions */ - - if (!clksrc->clk.ops) { - if (!clksrc->reg_div.reg) - clksrc->clk.ops = &clksrc_ops_nodiv; - else if (!clksrc->reg_src.reg) - clksrc->clk.ops = &clksrc_ops_nosrc; - else - clksrc->clk.ops = &clksrc_ops; - } - - /* setup the clocksource, but do not announce it - * as it may be re-set by the setup routines - * called after the rest of the clocks have been - * registered - */ - s3c_set_clksrc(clksrc, false); - - ret = s3c24xx_register_clock(&clksrc->clk); - - if (ret < 0) { - printk(KERN_ERR "%s: failed to register %s (%d)\n", - __func__, clksrc->clk.name, ret); - } - } -} diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c deleted file mode 100644 index d103ac1a52af..000000000000 --- a/arch/arm/plat-samsung/clock.c +++ /dev/null @@ -1,539 +0,0 @@ -/* linux/arch/arm/plat-s3c24xx/clock.c - * - * Copyright 2004-2005 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX Core clock control support - * - * Based on, and code from linux/arch/arm/mach-versatile/clock.c - ** - ** Copyright (C) 2004 ARM Limited. - ** Written by Deep Blue Solutions Limited. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/clk.h> -#include <linux/spinlock.h> -#include <linux/io.h> -#if defined(CONFIG_DEBUG_FS) -#include <linux/debugfs.h> -#endif - -#include <asm/irq.h> - -#include <plat/cpu-freq.h> - -#include <plat/clock.h> -#include <plat/cpu.h> - -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> /* for s3c24xx_uart_devs */ - -/* clock information */ - -static LIST_HEAD(clocks); - -/* We originally used an mutex here, but some contexts (see resume) - * are calling functions such as clk_set_parent() with IRQs disabled - * causing an BUG to be triggered. - */ -DEFINE_SPINLOCK(clocks_lock); - -/* Global watchdog clock used by arch_wtd_reset() callback */ -struct clk *s3c2410_wdtclk; -static int __init s3c_wdt_reset_init(void) -{ - s3c2410_wdtclk = clk_get(NULL, "watchdog"); - if (IS_ERR(s3c2410_wdtclk)) - printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); - return 0; -} -arch_initcall(s3c_wdt_reset_init); - -/* enable and disable calls for use with the clk struct */ - -static int clk_null_enable(struct clk *clk, int enable) -{ - return 0; -} - -int clk_enable(struct clk *clk) -{ - unsigned long flags; - - if (IS_ERR(clk) || clk == NULL) - return -EINVAL; - - clk_enable(clk->parent); - - spin_lock_irqsave(&clocks_lock, flags); - - if ((clk->usage++) == 0) - (clk->enable)(clk, 1); - - spin_unlock_irqrestore(&clocks_lock, flags); - return 0; -} - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - - if (IS_ERR(clk) || clk == NULL) - return; - - spin_lock_irqsave(&clocks_lock, flags); - - if ((--clk->usage) == 0) - (clk->enable)(clk, 0); - - spin_unlock_irqrestore(&clocks_lock, flags); - clk_disable(clk->parent); -} - - -unsigned long clk_get_rate(struct clk *clk) -{ - if (IS_ERR_OR_NULL(clk)) - return 0; - - if (clk->rate != 0) - return clk->rate; - - if (clk->ops != NULL && clk->ops->get_rate != NULL) - return (clk->ops->get_rate)(clk); - - if (clk->parent != NULL) - return clk_get_rate(clk->parent); - - return clk->rate; -} - -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - if (!IS_ERR_OR_NULL(clk) && clk->ops && clk->ops->round_rate) - return (clk->ops->round_rate)(clk, rate); - - return rate; -} - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret; - - if (IS_ERR_OR_NULL(clk)) - return -EINVAL; - - /* We do not default just do a clk->rate = rate as - * the clock may have been made this way by choice. - */ - - WARN_ON(clk->ops == NULL); - WARN_ON(clk->ops && clk->ops->set_rate == NULL); - - if (clk->ops == NULL || clk->ops->set_rate == NULL) - return -EINVAL; - - spin_lock_irqsave(&clocks_lock, flags); - ret = (clk->ops->set_rate)(clk, rate); - spin_unlock_irqrestore(&clocks_lock, flags); - - return ret; -} - -struct clk *clk_get_parent(struct clk *clk) -{ - return clk->parent; -} - -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - unsigned long flags; - int ret = 0; - - if (IS_ERR_OR_NULL(clk) || IS_ERR_OR_NULL(parent)) - return -EINVAL; - - spin_lock_irqsave(&clocks_lock, flags); - - if (clk->ops && clk->ops->set_parent) - ret = (clk->ops->set_parent)(clk, parent); - - spin_unlock_irqrestore(&clocks_lock, flags); - - return ret; -} - -EXPORT_SYMBOL(clk_enable); -EXPORT_SYMBOL(clk_disable); -EXPORT_SYMBOL(clk_get_rate); -EXPORT_SYMBOL(clk_round_rate); -EXPORT_SYMBOL(clk_set_rate); -EXPORT_SYMBOL(clk_get_parent); -EXPORT_SYMBOL(clk_set_parent); - -/* base clocks */ - -int clk_default_setrate(struct clk *clk, unsigned long rate) -{ - clk->rate = rate; - return 0; -} - -struct clk_ops clk_ops_def_setrate = { - .set_rate = clk_default_setrate, -}; - -struct clk clk_xtal = { - .name = "xtal", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, -}; - -struct clk clk_ext = { - .name = "ext", -}; - -struct clk clk_epll = { - .name = "epll", -}; - -struct clk clk_mpll = { - .name = "mpll", - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_upll = { - .name = "upll", - .parent = NULL, - .ctrlbit = 0, -}; - -struct clk clk_f = { - .name = "fclk", - .rate = 0, - .parent = &clk_mpll, - .ctrlbit = 0, -}; - -struct clk clk_h = { - .name = "hclk", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_p = { - .name = "pclk", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_usb_bus = { - .name = "usb-bus", - .rate = 0, - .parent = &clk_upll, -}; - - -struct clk s3c24xx_uclk = { - .name = "uclk", -}; - -/* initialise the clock system */ - -/** - * s3c24xx_register_clock() - register a clock - * @clk: The clock to register - * - * Add the specified clock to the list of clocks known by the system. - */ -int s3c24xx_register_clock(struct clk *clk) -{ - if (clk->enable == NULL) - clk->enable = clk_null_enable; - - /* fill up the clk_lookup structure and register it*/ - clk->lookup.dev_id = clk->devname; - clk->lookup.con_id = clk->name; - clk->lookup.clk = clk; - clkdev_add(&clk->lookup); - - return 0; -} - -/** - * s3c24xx_register_clocks() - register an array of clock pointers - * @clks: Pointer to an array of struct clk pointers - * @nr_clks: The number of clocks in the @clks array. - * - * Call s3c24xx_register_clock() for all the clock pointers contained - * in the @clks list. Returns the number of failures. - */ -int s3c24xx_register_clocks(struct clk **clks, int nr_clks) -{ - int fails = 0; - - for (; nr_clks > 0; nr_clks--, clks++) { - if (s3c24xx_register_clock(*clks) < 0) { - struct clk *clk = *clks; - printk(KERN_ERR "%s: failed to register %p: %s\n", - __func__, clk, clk->name); - fails++; - } - } - - return fails; -} - -/** - * s3c_register_clocks() - register an array of clocks - * @clkp: Pointer to the first clock in the array. - * @nr_clks: Number of clocks to register. - * - * Call s3c24xx_register_clock() on the @clkp array given, printing an - * error if it fails to register the clock (unlikely). - */ -void __init s3c_register_clocks(struct clk *clkp, int nr_clks) -{ - int ret; - - for (; nr_clks > 0; nr_clks--, clkp++) { - ret = s3c24xx_register_clock(clkp); - - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - } -} - -/** - * s3c_disable_clocks() - disable an array of clocks - * @clkp: Pointer to the first clock in the array. - * @nr_clks: Number of clocks to register. - * - * for internal use only at initialisation time. disable the clocks in the - * @clkp array. - */ - -void __init s3c_disable_clocks(struct clk *clkp, int nr_clks) -{ - for (; nr_clks > 0; nr_clks--, clkp++) - (clkp->enable)(clkp, 0); -} - -/* initialise all the clocks */ - -int __init s3c24xx_register_baseclocks(unsigned long xtal) -{ - printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n"); - - clk_xtal.rate = xtal; - - /* register our clocks */ - - if (s3c24xx_register_clock(&clk_xtal) < 0) - printk(KERN_ERR "failed to register master xtal\n"); - - if (s3c24xx_register_clock(&clk_mpll) < 0) - printk(KERN_ERR "failed to register mpll clock\n"); - - if (s3c24xx_register_clock(&clk_upll) < 0) - printk(KERN_ERR "failed to register upll clock\n"); - - if (s3c24xx_register_clock(&clk_f) < 0) - printk(KERN_ERR "failed to register cpu fclk\n"); - - if (s3c24xx_register_clock(&clk_h) < 0) - printk(KERN_ERR "failed to register cpu hclk\n"); - - if (s3c24xx_register_clock(&clk_p) < 0) - printk(KERN_ERR "failed to register cpu pclk\n"); - - return 0; -} - -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) -/* debugfs support to trace clock tree hierarchy and attributes */ - -static struct dentry *clk_debugfs_root; - -static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level) -{ - struct clk *child; - const char *state; - char buf[255] = { 0 }; - int n = 0; - - if (c->name) - n = snprintf(buf, sizeof(buf) - 1, "%s", c->name); - - if (c->devname) - n += snprintf(buf + n, sizeof(buf) - 1 - n, ":%s", c->devname); - - state = (c->usage > 0) ? "on" : "off"; - - seq_printf(s, "%*s%-*s %-6s %-3d %-10lu\n", - level * 3 + 1, "", - 50 - level * 3, buf, - state, c->usage, clk_get_rate(c)); - - list_for_each_entry(child, &clocks, list) { - if (child->parent != c) - continue; - - clock_tree_show_one(s, child, level + 1); - } -} - -static int clock_tree_show(struct seq_file *s, void *data) -{ - struct clk *c; - unsigned long flags; - - seq_printf(s, " clock state ref rate\n"); - seq_printf(s, "----------------------------------------------------\n"); - - spin_lock_irqsave(&clocks_lock, flags); - - list_for_each_entry(c, &clocks, list) - if (c->parent == NULL) - clock_tree_show_one(s, c, 0); - - spin_unlock_irqrestore(&clocks_lock, flags); - return 0; -} - -static int clock_tree_open(struct inode *inode, struct file *file) -{ - return single_open(file, clock_tree_show, inode->i_private); -} - -static const struct file_operations clock_tree_fops = { - .open = clock_tree_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int clock_rate_show(void *data, u64 *val) -{ - struct clk *c = data; - *val = clk_get_rate(c); - return 0; -} -DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_rate_show, NULL, "%llu\n"); - -static int clk_debugfs_register_one(struct clk *c) -{ - int err; - struct dentry *d; - struct clk *pa = c->parent; - char s[255]; - char *p = s; - - p += sprintf(p, "%s", c->devname); - - d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); - if (!d) - return -ENOMEM; - - c->dent = d; - - d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usage); - if (!d) { - err = -ENOMEM; - goto err_out; - } - - d = debugfs_create_file("rate", S_IRUGO, c->dent, c, &clock_rate_fops); - if (!d) { - err = -ENOMEM; - goto err_out; - } - return 0; - -err_out: - debugfs_remove_recursive(c->dent); - return err; -} - -static int clk_debugfs_register(struct clk *c) -{ - int err; - struct clk *pa = c->parent; - - if (pa && !pa->dent) { - err = clk_debugfs_register(pa); - if (err) - return err; - } - - if (!c->dent) { - err = clk_debugfs_register_one(c); - if (err) - return err; - } - return 0; -} - -static int __init clk_debugfs_init(void) -{ - struct clk *c; - struct dentry *d; - int err = -ENOMEM; - - d = debugfs_create_dir("clock", NULL); - if (!d) - return -ENOMEM; - clk_debugfs_root = d; - - d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL, - &clock_tree_fops); - if (!d) - goto err_out; - - list_for_each_entry(c, &clocks, list) { - err = clk_debugfs_register(c); - if (err) - goto err_out; - } - return 0; - -err_out: - debugfs_remove_recursive(clk_debugfs_root); - return err; -} -late_initcall(clk_debugfs_init); - -#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c index 364963a0a344..360618ee39e5 100644 --- a/arch/arm/plat-samsung/cpu.c +++ b/arch/arm/plat-samsung/cpu.c @@ -15,8 +15,7 @@ #include <linux/init.h> #include <linux/io.h> - -#include <mach/map.h> +#include <plat/map-base.h> #include <plat/cpu.h> unsigned long samsung_cpu_id; diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index ead4f1c94058..83c7d154bde0 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c @@ -53,7 +53,6 @@ #include <linux/platform_data/ata-samsung_cf.h> #include <plat/fb.h> #include <plat/fb-s3c2410.h> -#include <plat/hdmi.h> #include <linux/platform_data/hwmon-s3c.h> #include <linux/platform_data/i2c-s3c2410.h> #include <plat/keypad.h> @@ -145,23 +144,6 @@ struct platform_device s3c_device_camif = { }; #endif /* CONFIG_CPU_S3C2440 */ -/* ASOC DMA */ - -#ifdef CONFIG_PLAT_S5P -static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0); - -struct platform_device samsung_asoc_idma = { - .name = "samsung-idma", - .id = -1, - .num_resources = 1, - .resource = &samsung_asoc_idma_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif - /* FB */ #ifdef CONFIG_S3C_DEV_FB @@ -190,151 +172,6 @@ void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) } #endif /* CONFIG_S3C_DEV_FB */ -/* FIMC */ - -#ifdef CONFIG_S5P_DEV_FIMC0 -static struct resource s5p_fimc0_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_FIMC0), -}; - -struct platform_device s5p_device_fimc0 = { - .name = "s5p-fimc", - .id = 0, - .num_resources = ARRAY_SIZE(s5p_fimc0_resource), - .resource = s5p_fimc0_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -struct platform_device s5p_device_fimc_md = { - .name = "s5p-fimc-md", - .id = -1, -}; -#endif /* CONFIG_S5P_DEV_FIMC0 */ - -#ifdef CONFIG_S5P_DEV_FIMC1 -static struct resource s5p_fimc1_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_FIMC1), -}; - -struct platform_device s5p_device_fimc1 = { - .name = "s5p-fimc", - .id = 1, - .num_resources = ARRAY_SIZE(s5p_fimc1_resource), - .resource = s5p_fimc1_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; -#endif /* CONFIG_S5P_DEV_FIMC1 */ - -#ifdef CONFIG_S5P_DEV_FIMC2 -static struct resource s5p_fimc2_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_FIMC2), -}; - -struct platform_device s5p_device_fimc2 = { - .name = "s5p-fimc", - .id = 2, - .num_resources = ARRAY_SIZE(s5p_fimc2_resource), - .resource = s5p_fimc2_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; -#endif /* CONFIG_S5P_DEV_FIMC2 */ - -#ifdef CONFIG_S5P_DEV_FIMC3 -static struct resource s5p_fimc3_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_FIMC3), -}; - -struct platform_device s5p_device_fimc3 = { - .name = "s5p-fimc", - .id = 3, - .num_resources = ARRAY_SIZE(s5p_fimc3_resource), - .resource = s5p_fimc3_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; -#endif /* CONFIG_S5P_DEV_FIMC3 */ - -/* G2D */ - -#ifdef CONFIG_S5P_DEV_G2D -static struct resource s5p_g2d_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_2D), -}; - -struct platform_device s5p_device_g2d = { - .name = "s5p-g2d", - .id = 0, - .num_resources = ARRAY_SIZE(s5p_g2d_resource), - .resource = s5p_g2d_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; -#endif /* CONFIG_S5P_DEV_G2D */ - -#ifdef CONFIG_S5P_DEV_JPEG -static struct resource s5p_jpeg_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_JPEG), -}; - -struct platform_device s5p_device_jpeg = { - .name = "s5p-jpeg", - .id = 0, - .num_resources = ARRAY_SIZE(s5p_jpeg_resource), - .resource = s5p_jpeg_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; -#endif /* CONFIG_S5P_DEV_JPEG */ - -/* FIMD0 */ - -#ifdef CONFIG_S5P_DEV_FIMD0 -static struct resource s5p_fimd0_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K), - [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"), - [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"), - [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"), -}; - -struct platform_device s5p_device_fimd0 = { - .name = "s5p-fb", - .id = 0, - .num_resources = ARRAY_SIZE(s5p_fimd0_resource), - .resource = s5p_fimd0_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd) -{ - s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), - &s5p_device_fimd0); -} -#endif /* CONFIG_S5P_DEV_FIMD0 */ - /* HWMON */ #ifdef CONFIG_S3C_DEV_HWMON @@ -722,60 +559,6 @@ void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) } #endif /* CONFIG_S3C_DEV_I2C7 */ -/* I2C HDMIPHY */ - -#ifdef CONFIG_S5P_DEV_I2C_HDMIPHY -static struct resource s5p_i2c_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY), -}; - -struct platform_device s5p_device_i2c_hdmiphy = { - .name = "s3c2440-hdmiphy-i2c", - .id = -1, - .num_resources = ARRAY_SIZE(s5p_i2c_resource), - .resource = s5p_i2c_resource, -}; - -void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - - if (soc_is_s5pv210()) - pd->bus_num = 3; - else - pd->bus_num = 0; - } - - npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), - &s5p_device_i2c_hdmiphy); -} - -static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata; - -void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info, - struct i2c_board_info *mhl_info, int mhl_bus) -{ - struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata; - - if (soc_is_s5pv210()) - pd->hdmiphy_bus = 3; - else - pd->hdmiphy_bus = 0; - - pd->hdmiphy_info = hdmiphy_info; - pd->mhl_info = mhl_info; - pd->mhl_bus = mhl_bus; - - s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data), - &s5p_device_hdmi); -} - -#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */ - /* I2S */ #ifdef CONFIG_PLAT_S3C24XX @@ -879,36 +662,6 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) } #endif /* CONFIG_PLAT_S3C24XX */ -/* MIPI CSIS */ - -#ifdef CONFIG_S5P_DEV_CSIS0 -static struct resource s5p_mipi_csis0_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K), - [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0), -}; - -struct platform_device s5p_device_mipi_csis0 = { - .name = "s5p-mipi-csis", - .id = 0, - .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), - .resource = s5p_mipi_csis0_resource, -}; -#endif /* CONFIG_S5P_DEV_CSIS0 */ - -#ifdef CONFIG_S5P_DEV_CSIS1 -static struct resource s5p_mipi_csis1_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K), - [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1), -}; - -struct platform_device s5p_device_mipi_csis1 = { - .name = "s5p-mipi-csis", - .id = 1, - .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), - .resource = s5p_mipi_csis1_resource, -}; -#endif - /* NAND */ #ifdef CONFIG_S3C_DEV_NAND @@ -1052,43 +805,6 @@ void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) } #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ -#ifdef CONFIG_S5P_DEV_ONENAND -static struct resource s5p_onenand_resources[] = { - [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K), - [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K), - [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI), -}; - -struct platform_device s5p_device_onenand = { - .name = "s5pc110-onenand", - .id = -1, - .num_resources = ARRAY_SIZE(s5p_onenand_resources), - .resource = s5p_onenand_resources, -}; -#endif /* CONFIG_S5P_DEV_ONENAND */ - -/* PMU */ - -#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS) -static struct resource s5p_pmu_resource[] = { - DEFINE_RES_IRQ(IRQ_PMU) -}; - -static struct platform_device s5p_device_pmu = { - .name = "arm-pmu", - .id = -1, - .num_resources = ARRAY_SIZE(s5p_pmu_resource), - .resource = s5p_pmu_resource, -}; - -static int __init s5p_pmu_init(void) -{ - platform_device_register(&s5p_device_pmu); - return 0; -} -arch_initcall(s5p_pmu_init); -#endif /* CONFIG_PLAT_S5P */ - /* PWM Timer */ #ifdef CONFIG_SAMSUNG_DEV_PWM @@ -1251,52 +967,6 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) } #endif /* CONFIG_SAMSUNG_DEV_TS */ -/* TV */ - -#ifdef CONFIG_S5P_DEV_TV - -static struct resource s5p_hdmi_resources[] = { - [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M), - [1] = DEFINE_RES_IRQ(IRQ_HDMI), -}; - -struct platform_device s5p_device_hdmi = { - .name = "s5p-hdmi", - .id = -1, - .num_resources = ARRAY_SIZE(s5p_hdmi_resources), - .resource = s5p_hdmi_resources, -}; - -static struct resource s5p_sdo_resources[] = { - [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K), - [1] = DEFINE_RES_IRQ(IRQ_SDO), -}; - -struct platform_device s5p_device_sdo = { - .name = "s5p-sdo", - .id = -1, - .num_resources = ARRAY_SIZE(s5p_sdo_resources), - .resource = s5p_sdo_resources, -}; - -static struct resource s5p_mixer_resources[] = { - [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"), - [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"), - [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"), -}; - -struct platform_device s5p_device_mixer = { - .name = "s5p-mixer", - .id = -1, - .num_resources = ARRAY_SIZE(s5p_mixer_resources), - .resource = s5p_mixer_resources, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_S5P_DEV_TV */ - /* USB */ #ifdef CONFIG_S3C_DEV_USB_HOST diff --git a/arch/arm/plat-samsung/include/plat/camport.h b/arch/arm/plat-samsung/include/plat/camport.h deleted file mode 100644 index a5708bf84b3a..000000000000 --- a/arch/arm/plat-samsung/include/plat/camport.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co., Ltd. - * - * S5P series camera interface helper functions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __PLAT_SAMSUNG_CAMPORT_H_ -#define __PLAT_SAMSUNG_CAMPORT_H_ __FILE__ - -enum s5p_camport_id { - S5P_CAMPORT_A, - S5P_CAMPORT_B, -}; - -/* - * The helper functions to configure GPIO for the camera parallel bus. - * The camera port can be multiplexed with any FIMC entity, even multiple - * FIMC entities are allowed to be attached to a single port simultaneously. - * These functions are to be used in the board setup code. - */ -int s5pv210_fimc_setup_gpio(enum s5p_camport_id id); -int exynos4_fimc_setup_gpio(enum s5p_camport_id id); - -#endif /* __PLAT_SAMSUNG_CAMPORT_H */ diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h deleted file mode 100644 index 50a8ca7c3760..000000000000 --- a/arch/arm/plat-samsung/include/plat/clock-clksrc.h +++ /dev/null @@ -1,83 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h - * - * Parts taken from arch/arm/plat-s3c64xx/clock.c - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * Copyright 2009 Ben Dooks <ben-linux@fluff.org> - * Copyright 2009 Harald Welte - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/** - * struct clksrc_sources - list of sources for a given clock - * @sources: array of pointers to clocks - * @nr_sources: The size of @sources - */ -struct clksrc_sources { - unsigned int nr_sources; - struct clk **sources; -}; - -/** - * struct clksrc_reg - register definition for clock control bits - * @reg: pointer to the register in virtual memory. - * @shift: the shift in bits to where the bitfield is. - * @size: the size in bits of the bitfield. - * - * This specifies the size and position of the bits we are interested - * in within the register specified by @reg. - */ -struct clksrc_reg { - void __iomem *reg; - unsigned short shift; - unsigned short size; -}; - -/** - * struct clksrc_clk - class of clock for newer style samsung devices. - * @clk: the standard clock representation - * @sources: the sources for this clock - * @reg_src: the register definition for selecting the clock's source - * @reg_div: the register definition for the clock's output divisor - * - * This clock implements the features required by the newer SoCs where - * the standard clock block provides an input mux and a post-mux divisor - * to provide the periperhal's clock. - * - * The array of @sources provides the mapping of mux position to the - * clock, and @reg_src shows the code where to modify to change the mux - * position. The @reg_div defines how to change the divider settings on - * the output. - */ -struct clksrc_clk { - struct clk clk; - struct clksrc_sources *sources; - - struct clksrc_reg reg_src; - struct clksrc_reg reg_div; -}; - -/** - * s3c_set_clksrc() - setup the clock from the register settings - * @clk: The clock to setup. - * @announce: true to announce the setting to printk(). - * - * Setup the clock from the current register settings, for when the - * kernel boots or if it is resuming from a possibly unknown state. - */ -extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce); - -/** - * s3c_register_clksrc() register clocks from an array of clksrc clocks - * @srcs: The array of clocks to register - * @size: The size of the @srcs array. - * - * Initialise and register the array of clocks described by @srcs. - */ -extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size); diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h deleted file mode 100644 index 63239f409807..000000000000 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ /dev/null @@ -1,152 +0,0 @@ -/* linux/arch/arm/plat-s3c/include/plat/clock.h - * - * Copyright (c) 2004-2005 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * Written by Ben Dooks, <ben@simtec.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_CLOCK_H -#define __ASM_PLAT_CLOCK_H __FILE__ - -#include <linux/spinlock.h> -#include <linux/clkdev.h> - -struct clk; - -/** - * struct clk_ops - standard clock operations - * @set_rate: set the clock rate, see clk_set_rate(). - * @get_rate: get the clock rate, see clk_get_rate(). - * @round_rate: round a given clock rate, see clk_round_rate(). - * @set_parent: set the clock's parent, see clk_set_parent(). - * - * Group the common clock implementations together so that we - * don't have to keep setting the same fields again. We leave - * enable in struct clk. - * - * Adding an extra layer of indirection into the process should - * not be a problem as it is unlikely these operations are going - * to need to be called quickly. - */ -struct clk_ops { - int (*set_rate)(struct clk *c, unsigned long rate); - unsigned long (*get_rate)(struct clk *c); - unsigned long (*round_rate)(struct clk *c, unsigned long rate); - int (*set_parent)(struct clk *c, struct clk *parent); -}; - -struct clk { - struct list_head list; - struct module *owner; - struct clk *parent; - const char *name; - const char *devname; - int id; - int usage; - unsigned long rate; - unsigned long ctrlbit; - - struct clk_ops *ops; - int (*enable)(struct clk *, int enable); - struct clk_lookup lookup; -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) - struct dentry *dent; /* For visible tree hierarchy */ -#endif -}; - -/* other clocks which may be registered by board support */ - -extern struct clk s3c24xx_dclk0; -extern struct clk s3c24xx_dclk1; -extern struct clk s3c24xx_clkout0; -extern struct clk s3c24xx_clkout1; -extern struct clk s3c24xx_uclk; - -extern struct clk clk_usb_bus; - -/* core clock support */ - -extern struct clk clk_f; -extern struct clk clk_h; -extern struct clk clk_p; -extern struct clk clk_mpll; -extern struct clk clk_upll; -extern struct clk clk_epll; -extern struct clk clk_xtal; -extern struct clk clk_ext; - -/* S3C2443/S3C2416 specific clocks */ -extern struct clksrc_clk clk_epllref; -extern struct clksrc_clk clk_esysclk; - -/* S3C24XX UART clocks */ -extern struct clk s3c24xx_clk_uart0; -extern struct clk s3c24xx_clk_uart1; -extern struct clk s3c24xx_clk_uart2; - -/* S3C64XX specific clocks */ -extern struct clk clk_h2; -extern struct clk clk_27m; -extern struct clk clk_48m; -extern struct clk clk_xusbxti; - -extern int clk_default_setrate(struct clk *clk, unsigned long rate); -extern struct clk_ops clk_ops_def_setrate; - -/* exports for arch/arm/mach-s3c2410 - * - * Please DO NOT use these outside of arch/arm/mach-s3c2410 -*/ - -extern spinlock_t clocks_lock; - -extern int s3c2410_clkcon_enable(struct clk *clk, int enable); - -extern int s3c24xx_register_clock(struct clk *clk); -extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); - -extern void s3c_register_clocks(struct clk *clk, int nr_clks); -extern void s3c_disable_clocks(struct clk *clkp, int nr_clks); - -extern int s3c24xx_register_baseclocks(unsigned long xtal); - -extern void s5p_register_clocks(unsigned long xtal_freq); - -extern void s3c24xx_setup_clocks(unsigned long fclk, - unsigned long hclk, - unsigned long pclk); - -extern void s3c2410_setup_clocks(void); -extern void s3c2412_setup_clocks(void); -extern void s3c244x_setup_clocks(void); - -/* S3C2410 specific clock functions */ - -extern int s3c2410_baseclk_add(void); - -/* S3C2443/S3C2416 specific clock functions */ - -typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); - -extern void s3c2443_common_setup_clocks(pll_fn get_mpll); -extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, - unsigned int *divs, int nr_divs, - int divmask); - -extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable); -extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable); -extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable); - -/* S3C64XX specific functions and clocks */ - -extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable); - -/* Global watchdog clock used by arch_wtd_reset() callback */ - -extern struct clk *s3c2410_wdtclk; - -#endif /* __ASM_PLAT_CLOCK_H */ diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h index 72d4178ad23b..317c52303288 100644 --- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h @@ -140,7 +140,6 @@ struct s3c_cpufreq_config { * any frequency changes. This is really only need by devices like the * S3C2410 where there is no or limited divider between the PLL and the * ARMCLK. - * @resume_clocks: Update the clocks on resume. * @get_iotiming: Get the current IO timing data, mainly for use at start. * @set_iotiming: Update the IO timings from the cached copies calculated * from the @calc_iotiming entry when changing the frequency. @@ -169,8 +168,6 @@ struct s3c_cpufreq_info { /* driver routines */ - void (*resume_clocks)(void); - int (*get_iotiming)(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index d1d4659025bb..61d14f3a0426 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -47,7 +47,6 @@ IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK) IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) -IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK) #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ @@ -76,12 +75,6 @@ IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK) # define soc_is_s3c64xx() 0 #endif -#if defined(CONFIG_CPU_S5PV210) -# define soc_is_s5pv210() is_samsung_s5pv210() -#else -# define soc_is_s5pv210() 0 -#endif - #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } #ifndef KHZ @@ -117,12 +110,9 @@ extern void s3c_init_cpu(unsigned long idcode, /* core initialisation functions */ -extern void s5p_init_irq(u32 *vic, u32 num_vic); - extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); extern void s3c64xx_init_cpu(void); -extern void s5p_init_cpu(void __iomem *cpuid_addr); extern unsigned int samsung_rev(void); @@ -149,8 +139,5 @@ extern struct bus_type s3c2440_subsys; extern struct bus_type s3c2442_subsys; extern struct bus_type s3c2443_subsys; extern struct bus_type s3c6410_subsys; -extern struct bus_type s5pv210_subsys; - -extern void (*s5pc1xx_idle)(void); #endif diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 5f5a28d08c2e..e23fed311e5f 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -25,9 +25,6 @@ struct s3c24xx_uart_resources { extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; extern struct s3c24xx_uart_resources s3c64xx_uart_resources[]; -extern struct s3c24xx_uart_resources s5p_uart_resources[]; -extern struct s3c24xx_uart_resources exynos4_uart_resources[]; -extern struct s3c24xx_uart_resources exynos5_uart_resources[]; extern struct platform_device *s3c24xx_uart_devs[]; extern struct platform_device *s3c24xx_uart_src[]; @@ -75,45 +72,6 @@ extern struct platform_device s3c_device_usb_hsotg; extern struct platform_device s3c_device_usb_hsudc; extern struct platform_device s3c_device_wdt; -extern struct platform_device s5p_device_fimc0; -extern struct platform_device s5p_device_fimc1; -extern struct platform_device s5p_device_fimc2; -extern struct platform_device s5p_device_fimc3; -extern struct platform_device s5p_device_fimc_md; -extern struct platform_device s5p_device_jpeg; -extern struct platform_device s5p_device_g2d; -extern struct platform_device s5p_device_fimd0; -extern struct platform_device s5p_device_hdmi; -extern struct platform_device s5p_device_i2c_hdmiphy; -extern struct platform_device s5p_device_mfc; -extern struct platform_device s5p_device_mfc_l; -extern struct platform_device s5p_device_mfc_r; -extern struct platform_device s5p_device_mipi_csis0; -extern struct platform_device s5p_device_mipi_csis1; -extern struct platform_device s5p_device_mixer; -extern struct platform_device s5p_device_onenand; -extern struct platform_device s5p_device_sdo; - -extern struct platform_device s5pv210_device_ac97; -extern struct platform_device s5pv210_device_iis0; -extern struct platform_device s5pv210_device_iis1; -extern struct platform_device s5pv210_device_iis2; -extern struct platform_device s5pv210_device_pcm0; -extern struct platform_device s5pv210_device_pcm1; -extern struct platform_device s5pv210_device_pcm2; -extern struct platform_device s5pv210_device_spdif; - -extern struct platform_device exynos4_device_ac97; -extern struct platform_device exynos4_device_ahci; -extern struct platform_device exynos4_device_i2s0; -extern struct platform_device exynos4_device_i2s1; -extern struct platform_device exynos4_device_i2s2; -extern struct platform_device exynos4_device_ohci; -extern struct platform_device exynos4_device_pcm0; -extern struct platform_device exynos4_device_pcm1; -extern struct platform_device exynos4_device_pcm2; -extern struct platform_device exynos4_device_spdif; - extern struct platform_device samsung_asoc_idma; extern struct platform_device samsung_device_keypad; extern struct platform_device samsung_device_pwm; diff --git a/arch/arm/plat-samsung/include/plat/fb-core.h b/arch/arm/plat-samsung/include/plat/fb-core.h index 6abcbf139cee..bca383efcf6d 100644 --- a/arch/arm/plat-samsung/include/plat/fb-core.h +++ b/arch/arm/plat-samsung/include/plat/fb-core.h @@ -26,19 +26,4 @@ static inline void s3c_fb_setname(char *name) #endif } -/* Re-define device name depending on support. */ -static inline void s5p_fb_setname(int id, char *name) -{ - switch (id) { -#ifdef CONFIG_S5P_DEV_FIMD0 - case 0: - s5p_device_fimd0.name = name; - break; -#endif - default: - printk(KERN_ERR "%s: invalid device id(%d)\n", __func__, id); - break; - } -} - #endif /* __ASM_PLAT_FB_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 5a0e26afb961..b89f8f208515 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h @@ -26,32 +26,10 @@ extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd); /** - * s5p_fimd0_set_platdata() - Setup the FB device with platform data. - * @pd: The platform data to set. The data is copied from the passed structure - * so the machine data can mark the data __initdata so that any unused - * machines will end up dumping their data at runtime. - */ -extern void s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd); - -/** * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD * * Initialise the GPIO for an 24bpp LCD display on the RGB interface. */ extern void s3c64xx_fb_gpio_setup_24bpp(void); -/** - * s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD - * - * Initialise the GPIO for an 24bpp LCD display on the RGB interface. - */ -extern void s5pv210_fb_gpio_setup_24bpp(void); - -/** - * exynos4_fimd0_gpio_setup_24bpp() - Exynos4 setup function for 24bpp LCD0 - * - * Initialise the GPIO for an 24bpp LCD display on the RGB interface 0. - */ -extern void exynos4_fimd0_gpio_setup_24bpp(void); - #endif /* __PLAT_S3C_FB_H */ diff --git a/arch/arm/plat-samsung/include/plat/fimc-core.h b/arch/arm/plat-samsung/include/plat/fimc-core.h deleted file mode 100644 index 1d6cb2b8b094..000000000000 --- a/arch/arm/plat-samsung/include/plat/fimc-core.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * arch/arm/plat-samsung/include/plat/fimc-core.h - * - * Copyright 2010 Samsung Electronics Co., Ltd. - * Sylwester Nawrocki <s.nawrocki@samsung.com> - * - * Samsung camera interface driver core functions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_PLAT_FIMC_CORE_H -#define __ASM_PLAT_FIMC_CORE_H __FILE__ - -/* - * These functions are only for use with the core support code, such as - * the CPU-specific initialization code. - */ - -/* Re-define device name to differentiate the subsystem in various SoCs. */ -static inline void s3c_fimc_setname(int id, char *name) -{ - switch (id) { -#ifdef CONFIG_S5P_DEV_FIMC0 - case 0: - s5p_device_fimc0.name = name; - break; -#endif -#ifdef CONFIG_S5P_DEV_FIMC1 - case 1: - s5p_device_fimc1.name = name; - break; -#endif -#ifdef CONFIG_S5P_DEV_FIMC2 - case 2: - s5p_device_fimc2.name = name; - break; -#endif -#ifdef CONFIG_S5P_DEV_FIMC3 - case 3: - s5p_device_fimc3.name = name; - break; -#endif - default: - break; - } -} - -#endif /* __ASM_PLAT_FIMC_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 08740eed050c..b5294eff18b5 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -27,7 +27,6 @@ #include <linux/types.h> typedef unsigned int __bitwise__ samsung_gpio_pull_t; -typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; /* forward declaration if gpio-core.h hasn't been included */ struct samsung_gpio_chip; @@ -180,67 +179,4 @@ static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size, return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE); } -/* Define values for the drvstr available for each gpio pin. - * - * These values control the value of the output signal driver strength, - * configurable on most pins on the S5P series. - */ -#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0) -#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2) -#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1) -#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3) - -/** - * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin - * @pin: The pin number to get the settings for - * - * Read the driver streght value for the specified pin. -*/ -extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin); - -/** - * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin - * @pin: The pin number to configure the driver streght value - * @drvstr: The new value of the driver strength - * - * This function sets the driver strength value for the specified pin. - * It will return 0 if successful, or a negative error code if the pin - * cannot support the requested setting. -*/ -extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr); - -/** - * s5p_register_gpio_interrupt() - register interrupt support for a gpio group - * @pin: The pin number from the group to be registered - * - * This function registers gpio interrupt support for the group that the - * specified pin belongs to. - * - * The total number of gpio pins is quite large ob s5p series. Registering - * irq support for all of them would be a resource waste. Because of that the - * interrupt support for standard gpio pins is registered dynamically. - * - * It will return the irq number of the interrupt that has been registered - * or -ENOMEM if no more gpio interrupts can be registered. It is allowed - * to call this function more than once for the same gpio group (the group - * will be registered only once). - */ -extern int s5p_register_gpio_interrupt(int pin); - -/** s5p_register_gpioint_bank() - add gpio bank for further gpio interrupt - * registration (see s5p_register_gpio_interrupt function) - * @chain_irq: chained irq number for the gpio int handler for this bank - * @start: start gpio group number of this bank - * @nr_groups: number of gpio groups handled by this bank - * - * This functions registers initial information about gpio banks that - * can be later used by the s5p_register_gpio_interrupt() function to - * enable support for gpio interrupt for particular gpio group. - */ -#ifdef CONFIG_S5P_GPIO_INT -extern int s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups); -#else -#define s5p_register_gpioint_bank(chain_irq, start, nr_groups) do { } while (0) -#endif - #endif /* __PLAT_GPIO_CFG_H */ diff --git a/arch/arm/plat-samsung/include/plat/hdmi.h b/arch/arm/plat-samsung/include/plat/hdmi.h deleted file mode 100644 index 331d046ac2c5..000000000000 --- a/arch/arm/plat-samsung/include/plat/hdmi.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2012 Samsung Electronics Co.Ltd - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __PLAT_SAMSUNG_HDMI_H -#define __PLAT_SAMSUNG_HDMI_H __FILE__ - -extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info, - struct i2c_board_info *mhl_info, int mhl_bus); - -#endif /* __PLAT_SAMSUNG_HDMI_H */ diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h deleted file mode 100644 index 039001c0ef05..000000000000 --- a/arch/arm/plat-samsung/include/plat/irqs.h +++ /dev/null @@ -1,72 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/irqs.h - * - * Copyright (c) 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5P Common IRQ support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_SAMSUNG_IRQS_H -#define __PLAT_SAMSUNG_IRQS_H __FILE__ - -/* we keep the first set of CPU IRQs out of the range of - * the ISA space, so that the PC104 has them to itself - * and we don't end up having to do horrible things to the - * standard ISA drivers.... - * - * note, since we're using the VICs, our start must be a - * mulitple of 32 to allow the common code to work - */ - -#define S5P_IRQ_OFFSET (32) - -#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET) - -#define S5P_VIC0_BASE S5P_IRQ(0) -#define S5P_VIC1_BASE S5P_IRQ(32) -#define S5P_VIC2_BASE S5P_IRQ(64) -#define S5P_VIC3_BASE S5P_IRQ(96) - -#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32)) - -#define IRQ_VIC0_BASE S5P_VIC0_BASE -#define IRQ_VIC1_BASE S5P_VIC1_BASE -#define IRQ_VIC2_BASE S5P_VIC2_BASE - -/* VIC based IRQs */ - -#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) -#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) -#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) -#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) - -#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ - : ((x) - 16 + S5P_EINT_BASE2)) - -#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \ - ((irq) - S5P_EINT_BASE1) : \ - ((irq) + 16 - S5P_EINT_BASE2)) - -#define IRQ_EINT_BIT(x) EINT_OFFSET(x) - -/* Typically only a few gpio chips require gpio interrupt support. - To avoid memory waste irq descriptors are allocated only for - S5P_GPIOINT_GROUP_COUNT chips, each with total number of - S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged - to any gpio chip with the s5p_register_gpio_interrupt() function */ -#define S5P_GPIOINT_GROUP_COUNT 4 -#define S5P_GPIOINT_GROUP_SIZE 8 -#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE) - -/* IRQ types common for all s5p platforms */ -#define S5P_IRQ_TYPE_LEVEL_LOW (0x00) -#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01) -#define S5P_IRQ_TYPE_EDGE_FALLING (0x02) -#define S5P_IRQ_TYPE_EDGE_RISING (0x03) -#define S5P_IRQ_TYPE_EDGE_BOTH (0x04) - -#endif /* __PLAT_SAMSUNG_IRQS_H */ diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h deleted file mode 100644 index 033654e91e22..000000000000 --- a/arch/arm/plat-samsung/include/plat/mfc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co.Ltd - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __PLAT_SAMSUNG_MFC_H -#define __PLAT_SAMSUNG_MFC_H __FILE__ - -struct s5p_mfc_dt_meminfo { - unsigned long loff; - unsigned long lsize; - unsigned long roff; - unsigned long rsize; - char *compatible; -}; - -/** - * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver - * @rbase: base address for MFC 'right' memory interface - * @rsize: size of the memory reserved for MFC 'right' interface - * @lbase: base address for MFC 'left' memory interface - * @lsize: size of the memory reserved for MFC 'left' interface - * - * This function reserves system memory for both MFC device memory - * interfaces and registers it to respective struct device entries as - * coherent memory. - */ -void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, - phys_addr_t lbase, unsigned int lsize); - -#endif /* __PLAT_SAMSUNG_MFC_H */ diff --git a/arch/arm/plat-samsung/include/plat/pll.h b/arch/arm/plat-samsung/include/plat/pll.h deleted file mode 100644 index 357af7c1c664..000000000000 --- a/arch/arm/plat-samsung/include/plat/pll.h +++ /dev/null @@ -1,323 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/pll.h - * - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * Samsung PLL codes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <asm/div64.h> - -#define S3C24XX_PLL_MDIV_MASK (0xFF) -#define S3C24XX_PLL_PDIV_MASK (0x1F) -#define S3C24XX_PLL_SDIV_MASK (0x3) -#define S3C24XX_PLL_MDIV_SHIFT (12) -#define S3C24XX_PLL_PDIV_SHIFT (4) -#define S3C24XX_PLL_SDIV_SHIFT (0) - -static inline unsigned int s3c24xx_get_pll(unsigned int pllval, - unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = (pllval >> S3C24XX_PLL_MDIV_SHIFT) & S3C24XX_PLL_MDIV_MASK; - pdiv = (pllval >> S3C24XX_PLL_PDIV_SHIFT) & S3C24XX_PLL_PDIV_MASK; - sdiv = (pllval >> S3C24XX_PLL_SDIV_SHIFT) & S3C24XX_PLL_SDIV_MASK; - - fvco = (uint64_t)baseclk * (mdiv + 8); - do_div(fvco, (pdiv + 2) << sdiv); - - return (unsigned int)fvco; -} - -#define S3C2416_PLL_MDIV_MASK (0x3FF) -#define S3C2416_PLL_PDIV_MASK (0x3F) -#define S3C2416_PLL_SDIV_MASK (0x7) -#define S3C2416_PLL_MDIV_SHIFT (14) -#define S3C2416_PLL_PDIV_SHIFT (5) -#define S3C2416_PLL_SDIV_SHIFT (0) - -static inline unsigned int s3c2416_get_pll(unsigned int pllval, - unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = (pllval >> S3C2416_PLL_MDIV_SHIFT) & S3C2416_PLL_MDIV_MASK; - pdiv = (pllval >> S3C2416_PLL_PDIV_SHIFT) & S3C2416_PLL_PDIV_MASK; - sdiv = (pllval >> S3C2416_PLL_SDIV_SHIFT) & S3C2416_PLL_SDIV_MASK; - - fvco = (uint64_t)baseclk * mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned int)fvco; -} - -#define S3C6400_PLL_MDIV_MASK (0x3FF) -#define S3C6400_PLL_PDIV_MASK (0x3F) -#define S3C6400_PLL_SDIV_MASK (0x7) -#define S3C6400_PLL_MDIV_SHIFT (16) -#define S3C6400_PLL_PDIV_SHIFT (8) -#define S3C6400_PLL_SDIV_SHIFT (0) - -static inline unsigned long s3c6400_get_pll(unsigned long baseclk, - u32 pllcon) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK; - pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK; - sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -#define PLL6553X_MDIV_MASK (0x7F) -#define PLL6553X_PDIV_MASK (0x1F) -#define PLL6553X_SDIV_MASK (0x3) -#define PLL6553X_KDIV_MASK (0xFFFF) -#define PLL6553X_MDIV_SHIFT (16) -#define PLL6553X_PDIV_SHIFT (8) -#define PLL6553X_SDIV_SHIFT (0) - -static inline unsigned long s3c_get_pll6553x(unsigned long baseclk, - u32 pll_con0, u32 pll_con1) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK; - pdiv = (pll_con0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK; - sdiv = (pll_con0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK; - kdiv = pll_con1 & PLL6553X_KDIV_MASK; - - /* - * We need to multiple baseclk by mdiv (the integer part) and kdiv - * which is in 2^16ths, so shift mdiv up (does not overflow) and - * add kdiv before multiplying. The use of tmp is to avoid any - * overflows before shifting bac down into result when multipling - * by the mdiv and kdiv pair. - */ - - tmp = baseclk; - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - - return result; -} - -#define PLL35XX_MDIV_MASK (0x3FF) -#define PLL35XX_PDIV_MASK (0x3F) -#define PLL35XX_SDIV_MASK (0x7) -#define PLL35XX_MDIV_SHIFT (16) -#define PLL35XX_PDIV_SHIFT (8) -#define PLL35XX_SDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll35xx(unsigned long baseclk, u32 pll_con) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK; - pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK; - sdiv = (pll_con >> PLL35XX_SDIV_SHIFT) & PLL35XX_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -#define PLL36XX_KDIV_MASK (0xFFFF) -#define PLL36XX_MDIV_MASK (0x1FF) -#define PLL36XX_PDIV_MASK (0x3F) -#define PLL36XX_SDIV_MASK (0x7) -#define PLL36XX_MDIV_SHIFT (16) -#define PLL36XX_PDIV_SHIFT (8) -#define PLL36XX_SDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll36xx(unsigned long baseclk, - u32 pll_con0, u32 pll_con1) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK; - pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK; - sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK; - kdiv = pll_con1 & PLL36XX_KDIV_MASK; - - tmp = baseclk; - - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - - return result; -} - -#define PLL45XX_MDIV_MASK (0x3FF) -#define PLL45XX_PDIV_MASK (0x3F) -#define PLL45XX_SDIV_MASK (0x7) -#define PLL45XX_MDIV_SHIFT (16) -#define PLL45XX_PDIV_SHIFT (8) -#define PLL45XX_SDIV_SHIFT (0) - -enum pll45xx_type_t { - pll_4500, - pll_4502, - pll_4508 -}; - -static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, - enum pll45xx_type_t pll_type) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK; - pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK; - sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK; - - if (pll_type == pll_4508) - sdiv = sdiv - 1; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -/* CON0 bit-fields */ -#define PLL46XX_MDIV_MASK (0x1FF) -#define PLL46XX_PDIV_MASK (0x3F) -#define PLL46XX_SDIV_MASK (0x7) -#define PLL46XX_LOCKED_SHIFT (29) -#define PLL46XX_MDIV_SHIFT (16) -#define PLL46XX_PDIV_SHIFT (8) -#define PLL46XX_SDIV_SHIFT (0) - -/* CON1 bit-fields */ -#define PLL46XX_MRR_MASK (0x1F) -#define PLL46XX_MFR_MASK (0x3F) -#define PLL46XX_KDIV_MASK (0xFFFF) -#define PLL4650C_KDIV_MASK (0xFFF) -#define PLL46XX_MRR_SHIFT (24) -#define PLL46XX_MFR_SHIFT (16) -#define PLL46XX_KDIV_SHIFT (0) - -enum pll46xx_type_t { - pll_4600, - pll_4650, - pll_4650c, -}; - -static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, - u32 pll_con0, u32 pll_con1, - enum pll46xx_type_t pll_type) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; - pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; - sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; - kdiv = pll_con1 & PLL46XX_KDIV_MASK; - - if (pll_type == pll_4650c) - kdiv = pll_con1 & PLL4650C_KDIV_MASK; - else - kdiv = pll_con1 & PLL46XX_KDIV_MASK; - - tmp = baseclk; - - if (pll_type == pll_4600) { - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - } else { - tmp *= (mdiv << 10) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 10; - } - - return result; -} - -#define PLL90XX_MDIV_MASK (0xFF) -#define PLL90XX_PDIV_MASK (0x3F) -#define PLL90XX_SDIV_MASK (0x7) -#define PLL90XX_KDIV_MASK (0xffff) -#define PLL90XX_LOCKED_SHIFT (29) -#define PLL90XX_MDIV_SHIFT (16) -#define PLL90XX_PDIV_SHIFT (8) -#define PLL90XX_SDIV_SHIFT (0) -#define PLL90XX_KDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll90xx(unsigned long baseclk, - u32 pll_con, u32 pll_conk) -{ - unsigned long result; - u32 mdiv, pdiv, sdiv, kdiv; - u64 tmp; - - mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK; - pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK; - sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK; - kdiv = pll_conk & PLL90XX_KDIV_MASK; - - /* - * We need to multiple baseclk by mdiv (the integer part) and kdiv - * which is in 2^16ths, so shift mdiv up (does not overflow) and - * add kdiv before multiplying. The use of tmp is to avoid any - * overflows before shifting bac down into result when multipling - * by the mdiv and kdiv pair. - */ - - tmp = baseclk; - tmp *= (mdiv << 16) + kdiv; - do_div(tmp, (pdiv << sdiv)); - result = tmp >> 16; - - return result; -} - -#define PLL65XX_MDIV_MASK (0x3FF) -#define PLL65XX_PDIV_MASK (0x3F) -#define PLL65XX_SDIV_MASK (0x7) -#define PLL65XX_MDIV_SHIFT (16) -#define PLL65XX_PDIV_SHIFT (8) -#define PLL65XX_SDIV_SHIFT (0) - -static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pll_con >> PLL65XX_MDIV_SHIFT) & PLL65XX_MDIV_MASK; - pdiv = (pll_con >> PLL65XX_PDIV_SHIFT) & PLL65XX_PDIV_MASK; - sdiv = (pll_con >> PLL65XX_SDIV_SHIFT) & PLL65XX_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h deleted file mode 100644 index acacc4b88a39..000000000000 --- a/arch/arm/plat-samsung/include/plat/s5p-clock.h +++ /dev/null @@ -1,65 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s5p-clock.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for s5p clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_CLOCK_H -#define __ASM_PLAT_S5P_CLOCK_H __FILE__ - -#include <linux/clk.h> - -#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) - -#define clk_fin_apll clk_ext_xtal_mux -#define clk_fin_bpll clk_ext_xtal_mux -#define clk_fin_cpll clk_ext_xtal_mux -#define clk_fin_mpll clk_ext_xtal_mux -#define clk_fin_epll clk_ext_xtal_mux -#define clk_fin_dpll clk_ext_xtal_mux -#define clk_fin_vpll clk_ext_xtal_mux -#define clk_fin_hpll clk_ext_xtal_mux - -extern struct clk clk_ext_xtal_mux; -extern struct clk clk_xusbxti; -extern struct clk clk_48m; -extern struct clk s5p_clk_27m; -extern struct clk clk_fout_apll; -extern struct clk clk_fout_bpll; -extern struct clk clk_fout_bpll_div2; -extern struct clk clk_fout_cpll; -extern struct clk clk_fout_mpll; -extern struct clk clk_fout_mpll_div2; -extern struct clk clk_fout_epll; -extern struct clk clk_fout_dpll; -extern struct clk clk_fout_vpll; -extern struct clk clk_arm; -extern struct clk clk_vpll; - -extern struct clksrc_sources clk_src_apll; -extern struct clksrc_sources clk_src_bpll; -extern struct clksrc_sources clk_src_bpll_fout; -extern struct clksrc_sources clk_src_cpll; -extern struct clksrc_sources clk_src_mpll; -extern struct clksrc_sources clk_src_mpll_fout; -extern struct clksrc_sources clk_src_epll; -extern struct clksrc_sources clk_src_dpll; - -extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); - -/* Common EPLL operations for S5P platform */ -extern int s5p_epll_enable(struct clk *clk, int enable); -extern unsigned long s5p_epll_get_rate(struct clk *clk); - -/* SPDIF clk operations common for S5PV210/C110 and Exynos4 */ -extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); -extern unsigned long s5p_spdif_get_rate(struct clk *clk); - -extern struct clk_ops s5p_sclk_spdif_ops; -#endif /* __ASM_PLAT_S5P_CLOCK_H */ diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index f84b6cbc8745..2787553c3ae2 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -57,14 +57,6 @@ extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); -extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); -extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); -extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w); -extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); -extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); -extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); /* S3C2416 SDHCI setup */ @@ -144,45 +136,6 @@ static inline void s3c6400_default_sdhci2(void) { } #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ -/* S5PV210 SDHCI setup */ - -#ifdef CONFIG_S5PV210_SETUP_SDHCI -static inline void s5pv210_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; -#endif -} - -static inline void s5pv210_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; -#endif -} - -static inline void s5pv210_default_sdhci2(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC2 - s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; -#endif -} - -static inline void s5pv210_default_sdhci3(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC3 - s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; -#endif -} - -#else -static inline void s5pv210_default_sdhci0(void) { } -static inline void s5pv210_default_sdhci1(void) { } -static inline void s5pv210_default_sdhci2(void) { } -static inline void s5pv210_default_sdhci3(void) { } - -#endif /* CONFIG_S5PV210_SETUP_SDHCI */ - static inline void s3c_sdhci_setname(int id, char *name) { switch (id) { diff --git a/arch/arm/plat-samsung/include/plat/tv-core.h b/arch/arm/plat-samsung/include/plat/tv-core.h deleted file mode 100644 index 3bc34f3ce28f..000000000000 --- a/arch/arm/plat-samsung/include/plat/tv-core.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * arch/arm/plat-samsung/include/plat/tv.h - * - * Copyright 2011 Samsung Electronics Co., Ltd. - * Tomasz Stanislawski <t.stanislaws@samsung.com> - * - * Samsung TV driver core functions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __SAMSUNG_PLAT_TV_H -#define __SAMSUNG_PLAT_TV_H __FILE__ - -/* - * These functions are only for use with the core support code, such as - * the CPU-specific initialization code. - */ - -/* Re-define device name to differentiate the subsystem in various SoCs. */ -static inline void s5p_hdmi_setname(char *name) -{ -#ifdef CONFIG_S5P_DEV_TV - s5p_device_hdmi.name = name; -#endif -} - -static inline void s5p_mixer_setname(char *name) -{ -#ifdef CONFIG_S5P_DEV_TV - s5p_device_mixer.name = name; -#endif -} - -static inline void s5p_sdo_setname(char *name) -{ -#ifdef CONFIG_S5P_DEV_TV - s5p_device_sdo.name = name; -#endif -} - -#endif /* __SAMSUNG_PLAT_TV_H */ diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c index a1f925f3121f..11fbbc26e49f 100644 --- a/arch/arm/plat-samsung/init.c +++ b/arch/arm/plat-samsung/init.c @@ -30,7 +30,6 @@ #include <plat/cpu.h> #include <plat/devs.h> -#include <plat/clock.h> static struct cpu_table *cpu; diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c index da268813901b..f6084f641e6f 100644 --- a/arch/arm/plat-samsung/pm-gpio.c +++ b/arch/arm/plat-samsung/pm-gpio.c @@ -196,7 +196,7 @@ struct samsung_gpio_pm samsung_gpio_pm_2bit = { .resume = samsung_gpio_pm_2bit_resume, }; -#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) +#if defined(CONFIG_ARCH_S3C64XX) static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip) { chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); @@ -306,7 +306,7 @@ struct samsung_gpio_pm samsung_gpio_pm_4bit = { .save = samsung_gpio_pm_4bit_save, .resume = samsung_gpio_pm_4bit_resume, }; -#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */ +#endif /* CONFIG_ARCH_S3C64XX */ /** * samsung_pm_save_gpio() - save gpio chip data for suspend diff --git a/arch/arm/plat-samsung/s5p-clock.c b/arch/arm/plat-samsung/s5p-clock.c deleted file mode 100644 index 48a159911037..000000000000 --- a/arch/arm/plat-samsung/s5p-clock.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * Copyright 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5P - Common clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> -#include <asm/div64.h> - -#include <mach/regs-clock.h> - -#include <plat/clock.h> -#include <plat/clock-clksrc.h> -#include <plat/s5p-clock.h> - -/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call - * clk_ext_xtal_mux. -*/ -struct clk clk_ext_xtal_mux = { - .name = "ext_xtal", - .id = -1, -}; - -struct clk clk_xusbxti = { - .name = "xusbxti", - .id = -1, - .rate = 24000000, -}; - -struct clk s5p_clk_27m = { - .name = "clk_27m", - .id = -1, - .rate = 27000000, -}; - -/* 48MHz USB Phy clock output */ -struct clk clk_48m = { - .name = "clk_48m", - .id = -1, - .rate = 48000000, -}; - -/* APLL clock output - * No need .ctrlbit, this is always on -*/ -struct clk clk_fout_apll = { - .name = "fout_apll", - .id = -1, -}; - -/* BPLL clock output */ - -struct clk clk_fout_bpll = { - .name = "fout_bpll", - .id = -1, -}; - -struct clk clk_fout_bpll_div2 = { - .name = "fout_bpll_div2", - .id = -1, -}; - -/* CPLL clock output */ - -struct clk clk_fout_cpll = { - .name = "fout_cpll", - .id = -1, -}; - -/* MPLL clock output - * No need .ctrlbit, this is always on -*/ -struct clk clk_fout_mpll = { - .name = "fout_mpll", - .id = -1, -}; - -struct clk clk_fout_mpll_div2 = { - .name = "fout_mpll_div2", - .id = -1, -}; - -/* EPLL clock output */ -struct clk clk_fout_epll = { - .name = "fout_epll", - .id = -1, - .ctrlbit = (1 << 31), -}; - -/* DPLL clock output */ -struct clk clk_fout_dpll = { - .name = "fout_dpll", - .id = -1, - .ctrlbit = (1 << 31), -}; - -/* VPLL clock output */ -struct clk clk_fout_vpll = { - .name = "fout_vpll", - .id = -1, - .ctrlbit = (1 << 31), -}; - -/* Possible clock sources for APLL Mux */ -static struct clk *clk_src_apll_list[] = { - [0] = &clk_fin_apll, - [1] = &clk_fout_apll, -}; - -struct clksrc_sources clk_src_apll = { - .sources = clk_src_apll_list, - .nr_sources = ARRAY_SIZE(clk_src_apll_list), -}; - -/* Possible clock sources for BPLL Mux */ -static struct clk *clk_src_bpll_list[] = { - [0] = &clk_fin_bpll, - [1] = &clk_fout_bpll, -}; - -struct clksrc_sources clk_src_bpll = { - .sources = clk_src_bpll_list, - .nr_sources = ARRAY_SIZE(clk_src_bpll_list), -}; - -static struct clk *clk_src_bpll_fout_list[] = { - [0] = &clk_fout_bpll_div2, - [1] = &clk_fout_bpll, -}; - -struct clksrc_sources clk_src_bpll_fout = { - .sources = clk_src_bpll_fout_list, - .nr_sources = ARRAY_SIZE(clk_src_bpll_fout_list), -}; - -/* Possible clock sources for CPLL Mux */ -static struct clk *clk_src_cpll_list[] = { - [0] = &clk_fin_cpll, - [1] = &clk_fout_cpll, -}; - -struct clksrc_sources clk_src_cpll = { - .sources = clk_src_cpll_list, - .nr_sources = ARRAY_SIZE(clk_src_cpll_list), -}; - -/* Possible clock sources for MPLL Mux */ -static struct clk *clk_src_mpll_list[] = { - [0] = &clk_fin_mpll, - [1] = &clk_fout_mpll, -}; - -struct clksrc_sources clk_src_mpll = { - .sources = clk_src_mpll_list, - .nr_sources = ARRAY_SIZE(clk_src_mpll_list), -}; - -static struct clk *clk_src_mpll_fout_list[] = { - [0] = &clk_fout_mpll_div2, - [1] = &clk_fout_mpll, -}; - -struct clksrc_sources clk_src_mpll_fout = { - .sources = clk_src_mpll_fout_list, - .nr_sources = ARRAY_SIZE(clk_src_mpll_fout_list), -}; - -/* Possible clock sources for EPLL Mux */ -static struct clk *clk_src_epll_list[] = { - [0] = &clk_fin_epll, - [1] = &clk_fout_epll, -}; - -struct clksrc_sources clk_src_epll = { - .sources = clk_src_epll_list, - .nr_sources = ARRAY_SIZE(clk_src_epll_list), -}; - -/* Possible clock sources for DPLL Mux */ -static struct clk *clk_src_dpll_list[] = { - [0] = &clk_fin_dpll, - [1] = &clk_fout_dpll, -}; - -struct clksrc_sources clk_src_dpll = { - .sources = clk_src_dpll_list, - .nr_sources = ARRAY_SIZE(clk_src_dpll_list), -}; - -struct clk clk_vpll = { - .name = "vpll", - .id = -1, -}; - -int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable) -{ - unsigned int ctrlbit = clk->ctrlbit; - u32 con; - - con = __raw_readl(reg); - con = enable ? (con | ctrlbit) : (con & ~ctrlbit); - __raw_writel(con, reg); - return 0; -} - -int s5p_epll_enable(struct clk *clk, int enable) -{ - unsigned int ctrlbit = clk->ctrlbit; - unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit; - - if (enable) - __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON); - else - __raw_writel(epll_con, S5P_EPLL_CON); - - return 0; -} - -unsigned long s5p_epll_get_rate(struct clk *clk) -{ - return clk->rate; -} - -int s5p_spdif_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *pclk; - int ret; - - pclk = clk_get_parent(clk); - if (IS_ERR(pclk)) - return -EINVAL; - - ret = pclk->ops->set_rate(pclk, rate); - clk_put(pclk); - - return ret; -} - -unsigned long s5p_spdif_get_rate(struct clk *clk) -{ - struct clk *pclk; - int rate; - - pclk = clk_get_parent(clk); - if (IS_ERR(pclk)) - return -EINVAL; - - rate = pclk->ops->get_rate(pclk); - clk_put(pclk); - - return rate; -} - -struct clk_ops s5p_sclk_spdif_ops = { - .set_rate = s5p_spdif_set_rate, - .get_rate = s5p_spdif_get_rate, -}; - -static struct clk *s5p_clks[] __initdata = { - &clk_ext_xtal_mux, - &clk_48m, - &s5p_clk_27m, - &clk_fout_apll, - &clk_fout_mpll, - &clk_fout_epll, - &clk_fout_dpll, - &clk_fout_vpll, - &clk_vpll, - &clk_xusbxti, -}; - -void __init s5p_register_clocks(unsigned long xtal_freq) -{ - int ret; - - clk_ext_xtal_mux.rate = xtal_freq; - - ret = s3c24xx_register_clocks(s5p_clks, ARRAY_SIZE(s5p_clks)); - if (ret > 0) - printk(KERN_ERR "Failed to register s5p clocks\n"); -} diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c index 469b86260fe3..0b04b6b0fa30 100644 --- a/arch/arm/plat-samsung/s5p-dev-mfc.c +++ b/arch/arm/plat-samsung/s5p-dev-mfc.c @@ -17,56 +17,16 @@ #include <linux/of_fdt.h> #include <linux/of.h> -#include <plat/mfc.h> - -#ifdef CONFIG_SAMSUNG_ATAGS -#include <mach/map.h> -#include <mach/irqs.h> -#include <plat/devs.h> - -static struct resource s5p_mfc_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K), - [1] = DEFINE_RES_IRQ(IRQ_MFC), -}; - -struct platform_device s5p_device_mfc = { - .name = "s5p-mfc", - .id = -1, - .num_resources = ARRAY_SIZE(s5p_mfc_resource), - .resource = s5p_mfc_resource, -}; - -/* - * MFC hardware has 2 memory interfaces which are modelled as two separate - * platform devices to let dma-mapping distinguish between them. - * - * MFC parent device (s5p_device_mfc) must be registered before memory - * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r). - */ - -struct platform_device s5p_device_mfc_l = { - .name = "s5p-mfc-l", - .id = -1, - .dev = { - .parent = &s5p_device_mfc.dev, - .dma_mask = &s5p_device_mfc_l.dev.coherent_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -struct platform_device s5p_device_mfc_r = { - .name = "s5p-mfc-r", - .id = -1, - .dev = { - .parent = &s5p_device_mfc.dev, - .dma_mask = &s5p_device_mfc_r.dev.coherent_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; -#else static struct platform_device s5p_device_mfc_l; static struct platform_device s5p_device_mfc_r; -#endif + +struct s5p_mfc_dt_meminfo { + unsigned long loff; + unsigned long lsize; + unsigned long roff; + unsigned long rsize; + char *compatible; +}; struct s5p_mfc_reserved_mem { phys_addr_t base; @@ -77,7 +37,7 @@ struct s5p_mfc_reserved_mem { static struct s5p_mfc_reserved_mem s5p_mfc_mem[2] __initdata; -void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, +static void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, phys_addr_t lbase, unsigned int lsize) { int i; @@ -100,28 +60,6 @@ void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, } } -#ifdef CONFIG_SAMSUNG_ATAGS -static int __init s5p_mfc_memory_init(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(s5p_mfc_mem); i++) { - struct s5p_mfc_reserved_mem *area = &s5p_mfc_mem[i]; - if (!area->base) - continue; - - if (dma_declare_coherent_memory(area->dev, area->base, - area->base, area->size, - DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0) - printk(KERN_ERR "Failed to declare coherent memory for MFC device (%ld bytes at 0x%08lx)\n", - area->size, (unsigned long) area->base); - } - return 0; -} -device_initcall(s5p_mfc_memory_init); -#endif - -#ifdef CONFIG_OF int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname, int depth, void *data) { @@ -154,4 +92,3 @@ int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname, return 1; } -#endif diff --git a/arch/arm/plat-samsung/s5p-dev-uart.c b/arch/arm/plat-samsung/s5p-dev-uart.c deleted file mode 100644 index 8c4487af98c8..000000000000 --- a/arch/arm/plat-samsung/s5p-dev-uart.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright (c) 2009,2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Base S5P UART resource and device definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/ioport.h> -#include <linux/platform_device.h> - -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> -#include <mach/map.h> - -#include <plat/devs.h> - - /* Serial port registrations */ - -static struct resource s5p_uart0_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_UART0, S5P_SZ_UART), - [1] = DEFINE_RES_IRQ(IRQ_UART0), -}; - -static struct resource s5p_uart1_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_UART1, S5P_SZ_UART), - [1] = DEFINE_RES_IRQ(IRQ_UART1), -}; - -static struct resource s5p_uart2_resource[] = { - [0] = DEFINE_RES_MEM(S5P_PA_UART2, S5P_SZ_UART), - [1] = DEFINE_RES_IRQ(IRQ_UART2), -}; - -static struct resource s5p_uart3_resource[] = { -#if CONFIG_SERIAL_SAMSUNG_UARTS > 3 - [0] = DEFINE_RES_MEM(S5P_PA_UART3, S5P_SZ_UART), - [1] = DEFINE_RES_IRQ(IRQ_UART3), -#endif -}; - -static struct resource s5p_uart4_resource[] = { -#if CONFIG_SERIAL_SAMSUNG_UARTS > 4 - [0] = DEFINE_RES_MEM(S5P_PA_UART4, S5P_SZ_UART), - [1] = DEFINE_RES_IRQ(IRQ_UART4), -#endif -}; - -static struct resource s5p_uart5_resource[] = { -#if CONFIG_SERIAL_SAMSUNG_UARTS > 5 - [0] = DEFINE_RES_MEM(S5P_PA_UART5, S5P_SZ_UART), - [1] = DEFINE_RES_IRQ(IRQ_UART5), -#endif -}; - -struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = { - [0] = { - .resources = s5p_uart0_resource, - .nr_resources = ARRAY_SIZE(s5p_uart0_resource), - }, - [1] = { - .resources = s5p_uart1_resource, - .nr_resources = ARRAY_SIZE(s5p_uart1_resource), - }, - [2] = { - .resources = s5p_uart2_resource, - .nr_resources = ARRAY_SIZE(s5p_uart2_resource), - }, - [3] = { - .resources = s5p_uart3_resource, - .nr_resources = ARRAY_SIZE(s5p_uart3_resource), - }, - [4] = { - .resources = s5p_uart4_resource, - .nr_resources = ARRAY_SIZE(s5p_uart4_resource), - }, - [5] = { - .resources = s5p_uart5_resource, - .nr_resources = ARRAY_SIZE(s5p_uart5_resource), - }, -}; diff --git a/arch/arm/plat-samsung/s5p-irq-eint.c b/arch/arm/plat-samsung/s5p-irq-eint.c deleted file mode 100644 index ebee4dc11a94..000000000000 --- a/arch/arm/plat-samsung/s5p-irq-eint.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P - IRQ EINT support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/device.h> -#include <linux/gpio.h> -#include <linux/irqchip/arm-vic.h> -#include <linux/of.h> - -#include <plat/regs-irqtype.h> - -#include <mach/map.h> -#include <plat/cpu.h> -#include <plat/pm.h> - -#include <plat/gpio-cfg.h> -#include <mach/regs-gpio.h> - -static inline void s5p_irq_eint_mask(struct irq_data *data) -{ - u32 mask; - - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); - mask |= eint_irq_to_bit(data->irq); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); -} - -static void s5p_irq_eint_unmask(struct irq_data *data) -{ - u32 mask; - - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); - mask &= ~(eint_irq_to_bit(data->irq)); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); -} - -static inline void s5p_irq_eint_ack(struct irq_data *data) -{ - __raw_writel(eint_irq_to_bit(data->irq), - S5P_EINT_PEND(EINT_REG_NR(data->irq))); -} - -static void s5p_irq_eint_maskack(struct irq_data *data) -{ - /* compiler should in-line these */ - s5p_irq_eint_mask(data); - s5p_irq_eint_ack(data); -} - -static int s5p_irq_eint_set_type(struct irq_data *data, unsigned int type) -{ - int offs = EINT_OFFSET(data->irq); - int shift; - u32 ctrl, mask; - u32 newvalue = 0; - - switch (type) { - case IRQ_TYPE_EDGE_RISING: - newvalue = S5P_IRQ_TYPE_EDGE_RISING; - break; - - case IRQ_TYPE_EDGE_FALLING: - newvalue = S5P_IRQ_TYPE_EDGE_FALLING; - break; - - case IRQ_TYPE_EDGE_BOTH: - newvalue = S5P_IRQ_TYPE_EDGE_BOTH; - break; - - case IRQ_TYPE_LEVEL_LOW: - newvalue = S5P_IRQ_TYPE_LEVEL_LOW; - break; - - case IRQ_TYPE_LEVEL_HIGH: - newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; - break; - - default: - printk(KERN_ERR "No such irq type %d", type); - return -EINVAL; - } - - shift = (offs & 0x7) * 4; - mask = 0x7 << shift; - - ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); - ctrl &= ~mask; - ctrl |= newvalue << shift; - __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); - - if ((0 <= offs) && (offs < 8)) - s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); - - else if ((8 <= offs) && (offs < 16)) - s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); - - else if ((16 <= offs) && (offs < 24)) - s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); - - else if ((24 <= offs) && (offs < 32)) - s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); - - else - printk(KERN_ERR "No such irq number %d", offs); - - return 0; -} - -static struct irq_chip s5p_irq_eint = { - .name = "s5p-eint", - .irq_mask = s5p_irq_eint_mask, - .irq_unmask = s5p_irq_eint_unmask, - .irq_mask_ack = s5p_irq_eint_maskack, - .irq_ack = s5p_irq_eint_ack, - .irq_set_type = s5p_irq_eint_set_type, -#ifdef CONFIG_PM - .irq_set_wake = s3c_irqext_wake, -#endif -}; - -/* s5p_irq_demux_eint - * - * This function demuxes the IRQ from the group0 external interrupts, - * from EINTs 16 to 31. It is designed to be inlined into the specific - * handler s5p_irq_demux_eintX_Y. - * - * Each EINT pend/mask registers handle eight of them. - */ -static inline void s5p_irq_demux_eint(unsigned int start) -{ - u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); - u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); - unsigned int irq; - - status &= ~mask; - status &= 0xff; - - while (status) { - irq = fls(status) - 1; - generic_handle_irq(irq + start); - status &= ~(1 << irq); - } -} - -static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) -{ - s5p_irq_demux_eint(IRQ_EINT(16)); - s5p_irq_demux_eint(IRQ_EINT(24)); -} - -static inline void s5p_irq_vic_eint_mask(struct irq_data *data) -{ - void __iomem *base = irq_data_get_irq_chip_data(data); - - s5p_irq_eint_mask(data); - writel(1 << EINT_OFFSET(data->irq), base + VIC_INT_ENABLE_CLEAR); -} - -static void s5p_irq_vic_eint_unmask(struct irq_data *data) -{ - void __iomem *base = irq_data_get_irq_chip_data(data); - - s5p_irq_eint_unmask(data); - writel(1 << EINT_OFFSET(data->irq), base + VIC_INT_ENABLE); -} - -static inline void s5p_irq_vic_eint_ack(struct irq_data *data) -{ - __raw_writel(eint_irq_to_bit(data->irq), - S5P_EINT_PEND(EINT_REG_NR(data->irq))); -} - -static void s5p_irq_vic_eint_maskack(struct irq_data *data) -{ - s5p_irq_vic_eint_mask(data); - s5p_irq_vic_eint_ack(data); -} - -static struct irq_chip s5p_irq_vic_eint = { - .name = "s5p_vic_eint", - .irq_mask = s5p_irq_vic_eint_mask, - .irq_unmask = s5p_irq_vic_eint_unmask, - .irq_mask_ack = s5p_irq_vic_eint_maskack, - .irq_ack = s5p_irq_vic_eint_ack, - .irq_set_type = s5p_irq_eint_set_type, -#ifdef CONFIG_PM - .irq_set_wake = s3c_irqext_wake, -#endif -}; - -static int __init s5p_init_irq_eint(void) -{ - int irq; - - if (of_have_populated_dt()) - return -ENODEV; - - for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) - irq_set_chip(irq, &s5p_irq_vic_eint); - - for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { - irq_set_chip_and_handler(irq, &s5p_irq_eint, handle_level_irq); - set_irq_flags(irq, IRQF_VALID); - } - - irq_set_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); - return 0; -} - -arch_initcall(s5p_init_irq_eint); diff --git a/arch/arm/plat-samsung/s5p-irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c deleted file mode 100644 index fafdb059043a..000000000000 --- a/arch/arm/plat-samsung/s5p-irq-gpioint.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * Author: Kyungmin Park <kyungmin.park@samsung.com> - * Author: Joonyoung Shim <jy0922.shim@samsung.com> - * Author: Marek Szyprowski <m.szyprowski@samsung.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/irqchip/chained_irq.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/slab.h> - -#include <mach/map.h> -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> - -#define GPIO_BASE(chip) ((void __iomem *)((unsigned long)((chip)->base) & 0xFFFFF000u)) - -#define CON_OFFSET 0x700 -#define MASK_OFFSET 0x900 -#define PEND_OFFSET 0xA00 -#define REG_OFFSET(x) ((x) << 2) - -struct s5p_gpioint_bank { - struct list_head list; - int start; - int nr_groups; - int irq; - struct samsung_gpio_chip **chips; - void (*handler)(unsigned int, struct irq_desc *); -}; - -static LIST_HEAD(banks); - -static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type) -{ - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - struct irq_chip_type *ct = gc->chip_types; - unsigned int shift = (d->irq - gc->irq_base) << 2; - - switch (type) { - case IRQ_TYPE_EDGE_RISING: - type = S5P_IRQ_TYPE_EDGE_RISING; - break; - case IRQ_TYPE_EDGE_FALLING: - type = S5P_IRQ_TYPE_EDGE_FALLING; - break; - case IRQ_TYPE_EDGE_BOTH: - type = S5P_IRQ_TYPE_EDGE_BOTH; - break; - case IRQ_TYPE_LEVEL_HIGH: - type = S5P_IRQ_TYPE_LEVEL_HIGH; - break; - case IRQ_TYPE_LEVEL_LOW: - type = S5P_IRQ_TYPE_LEVEL_LOW; - break; - case IRQ_TYPE_NONE: - default: - printk(KERN_WARNING "No irq type\n"); - return -EINVAL; - } - - gc->type_cache &= ~(0x7 << shift); - gc->type_cache |= type << shift; - writel(gc->type_cache, gc->reg_base + ct->regs.type); - return 0; -} - -static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) -{ - struct s5p_gpioint_bank *bank = irq_get_handler_data(irq); - int group, pend_offset, mask_offset; - unsigned int pend, mask; - - struct irq_chip *chip = irq_get_chip(irq); - chained_irq_enter(chip, desc); - - for (group = 0; group < bank->nr_groups; group++) { - struct samsung_gpio_chip *chip = bank->chips[group]; - if (!chip) - continue; - - pend_offset = REG_OFFSET(group); - pend = __raw_readl(GPIO_BASE(chip) + PEND_OFFSET + pend_offset); - if (!pend) - continue; - - mask_offset = REG_OFFSET(group); - mask = __raw_readl(GPIO_BASE(chip) + MASK_OFFSET + mask_offset); - pend &= ~mask; - - while (pend) { - int offset = fls(pend) - 1; - int real_irq = chip->irq_base + offset; - generic_handle_irq(real_irq); - pend &= ~BIT(offset); - } - } - chained_irq_exit(chip, desc); -} - -static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip) -{ - static int used_gpioint_groups = 0; - int group = chip->group; - struct s5p_gpioint_bank *b, *bank = NULL; - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - - if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT) - return -ENOMEM; - - list_for_each_entry(b, &banks, list) { - if (group >= b->start && group < b->start + b->nr_groups) { - bank = b; - break; - } - } - if (!bank) - return -EINVAL; - - if (!bank->handler) { - bank->chips = kzalloc(sizeof(struct samsung_gpio_chip *) * - bank->nr_groups, GFP_KERNEL); - if (!bank->chips) - return -ENOMEM; - - irq_set_chained_handler(bank->irq, s5p_gpioint_handler); - irq_set_handler_data(bank->irq, bank); - bank->handler = s5p_gpioint_handler; - printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n", - bank->irq); - } - - /* - * chained GPIO irq has been successfully registered, allocate new gpio - * int group and assign irq nubmers - */ - chip->irq_base = S5P_GPIOINT_BASE + - used_gpioint_groups * S5P_GPIOINT_GROUP_SIZE; - used_gpioint_groups++; - - bank->chips[group - bank->start] = chip; - - gc = irq_alloc_generic_chip("s5p_gpioint", 1, chip->irq_base, - GPIO_BASE(chip), - handle_level_irq); - if (!gc) - return -ENOMEM; - ct = gc->chip_types; - ct->chip.irq_ack = irq_gc_ack_set_bit; - ct->chip.irq_mask = irq_gc_mask_set_bit; - ct->chip.irq_unmask = irq_gc_mask_clr_bit; - ct->chip.irq_set_type = s5p_gpioint_set_type, - ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start); - ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start); - ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start); - irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio), - IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); - return 0; -} - -int __init s5p_register_gpio_interrupt(int pin) -{ - struct samsung_gpio_chip *my_chip = samsung_gpiolib_getchip(pin); - int offset, group; - int ret; - - if (!my_chip) - return -EINVAL; - - offset = pin - my_chip->chip.base; - group = my_chip->group; - - /* check if the group has been already registered */ - if (my_chip->irq_base) - goto success; - - /* register gpio group */ - ret = s5p_gpioint_add(my_chip); - if (ret == 0) { - my_chip->chip.to_irq = samsung_gpiolib_to_irq; - printk(KERN_INFO "Registered interrupt support for gpio group %d.\n", - group); - goto success; - } - return ret; -success: - my_chip->bitmap_gpio_int |= BIT(offset); - - return my_chip->irq_base + offset; -} - -int __init s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups) -{ - struct s5p_gpioint_bank *bank; - - bank = kzalloc(sizeof(*bank), GFP_KERNEL); - if (!bank) - return -ENOMEM; - - bank->start = start; - bank->nr_groups = nr_groups; - bank->irq = chain_irq; - - list_add_tail(&bank->list, &banks); - return 0; -} diff --git a/arch/arm/plat-samsung/s5p-irq-pm.c b/arch/arm/plat-samsung/s5p-irq-pm.c deleted file mode 100644 index 52b16943617e..000000000000 --- a/arch/arm/plat-samsung/s5p-irq-pm.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Based on arch/arm/plat-s3c24xx/irq-pm.c, - * Copyright (c) 2003,2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> - -#include <plat/cpu.h> -#include <plat/irqs.h> -#include <plat/pm.h> -#include <mach/map.h> - -#include <mach/regs-gpio.h> -#include <mach/regs-irq.h> - -/* state for IRQs over sleep */ - -/* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM, - * as wakeup sources - * - * set bit to 1 in allow bitfield to enable the wakeup settings on it -*/ - -unsigned long s3c_irqwake_intallow = 0x00000006L; -unsigned long s3c_irqwake_eintallow = 0xffffffffL; - -int s3c_irq_wake(struct irq_data *data, unsigned int state) -{ - unsigned long irqbit; - unsigned int irq_rtc_tic, irq_rtc_alarm; - - irq_rtc_tic = IRQ_RTC_TIC; - irq_rtc_alarm = IRQ_RTC_ALARM; - - if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) { - irqbit = 1 << (data->irq + 1 - irq_rtc_alarm); - - if (!state) - s3c_irqwake_intmask |= irqbit; - else - s3c_irqwake_intmask &= ~irqbit; - } else { - return -ENOENT; - } - - return 0; -} - -static struct sleep_save eint_save[] = { - SAVE_ITEM(S5P_EINT_CON(0)), - SAVE_ITEM(S5P_EINT_CON(1)), - SAVE_ITEM(S5P_EINT_CON(2)), - SAVE_ITEM(S5P_EINT_CON(3)), - - SAVE_ITEM(S5P_EINT_FLTCON(0)), - SAVE_ITEM(S5P_EINT_FLTCON(1)), - SAVE_ITEM(S5P_EINT_FLTCON(2)), - SAVE_ITEM(S5P_EINT_FLTCON(3)), - SAVE_ITEM(S5P_EINT_FLTCON(4)), - SAVE_ITEM(S5P_EINT_FLTCON(5)), - SAVE_ITEM(S5P_EINT_FLTCON(6)), - SAVE_ITEM(S5P_EINT_FLTCON(7)), - - SAVE_ITEM(S5P_EINT_MASK(0)), - SAVE_ITEM(S5P_EINT_MASK(1)), - SAVE_ITEM(S5P_EINT_MASK(2)), - SAVE_ITEM(S5P_EINT_MASK(3)), -}; - -int s3c24xx_irq_suspend(void) -{ - s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save)); - - return 0; -} - -void s3c24xx_irq_resume(void) -{ - s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save)); -} - diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c deleted file mode 100644 index ddfaca9c79d8..000000000000 --- a/arch/arm/plat-samsung/s5p-irq.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5P - Interrupt handling - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/irqchip/arm-vic.h> - -#include <mach/irqs.h> -#include <mach/map.h> -#include <plat/cpu.h> - -void __init s5p_init_irq(u32 *vic, u32 num_vic) -{ -#ifdef CONFIG_ARM_VIC - int irq; - - /* initialize the VICs */ - for (irq = 0; irq < num_vic; irq++) - vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); -#endif -} diff --git a/arch/arm/plat-samsung/s5p-pm.c b/arch/arm/plat-samsung/s5p-pm.c deleted file mode 100644 index 0747468f0936..000000000000 --- a/arch/arm/plat-samsung/s5p-pm.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P Power Manager (Suspend-To-RAM) support - * - * Based on arch/arm/plat-s3c24xx/pm.c - * Copyright (c) 2004,2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/suspend.h> -#include <plat/pm.h> - -#define PFX "s5p pm: " - -/* s3c_pm_configure_extint - * - * configure all external interrupt pins -*/ - -void s3c_pm_configure_extint(void) -{ - /* nothing here yet */ -} - -void s3c_pm_restore_core(void) -{ - /* nothing here yet */ -} - -void s3c_pm_save_core(void) -{ - /* nothing here yet */ -} - diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-samsung/s5p-sleep.S deleted file mode 100644 index 25c68ceb9e2b..000000000000 --- a/arch/arm/plat-samsung/s5p-sleep.S +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common S5P Sleep Code - * Based on S3C64XX sleep code by: - * Ben Dooks, (c) 2008 Simtec Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include <linux/linkage.h> - - .data - .align - - /* - * sleep magic, to allow the bootloader to check for an valid - * image to resume to. Must be the first word before the - * s3c_cpu_resume entry. - */ - - .word 0x2bedf00d - - /* - * s3c_cpu_resume - * - * resume code entry for bootloader to call - */ - -ENTRY(s3c_cpu_resume) - b cpu_resume -ENDPROC(s3c_cpu_resume) |