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authorRongjun Ying <Rongjun.Ying@csr.com>2014-01-03 10:59:26 +0800
committerBarry Song <Baohua.Song@csr.com>2014-01-09 20:05:31 +0800
commit73f68c01f468f072776d98f6bbf7fb367a1f2540 (patch)
tree381bfba6b53e2608020ee52314c5168372f13d61 /arch/arm
parentec2b50cad1cf6e80b86eccae40404827161b94c5 (diff)
ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
add pin groups for USP0 only holding one of TX and RX frame sync. this patch matches with the change in drivers/pinctrl/sirf. Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Barry Song <Barry.Song@csr.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/prima2.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 00a4b20c0384..0e219932d7cc 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -550,6 +550,18 @@
"usp0_uart_nostreamctrl";
};
};
+ usp0_only_utfs_pins_a: usp0@2 {
+ usp0 {
+ sirf,pins = "usp0_only_utfs_grp";
+ sirf,function = "usp0_only_utfs";
+ };
+ };
+ usp0_only_urfs_pins_a: usp0@3 {
+ usp0 {
+ sirf,pins = "usp0_only_urfs_grp";
+ sirf,function = "usp0_only_urfs";
+ };
+ };
usp1_pins_a: usp1@0 {
usp1 {
sirf,pins = "usp1grp";