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| author | Linux Build Service Account <lnxbuild@localhost> | 2016-07-22 08:56:20 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-07-22 08:56:20 -0700 |
| commit | c29dc4ae0add961bc402b1670ae2098aee5d77cf (patch) | |
| tree | 2fdd60f1709624fdf668da062d4c41f51825a1e8 /arch/arm | |
| parent | a75cdc332bf941586165a427599e7cae20a82750 (diff) | |
| parent | d375ea2d637d038bdd45a00ac0e81b8dc03ff3fd (diff) | |
Merge "ARM: dts: msm: Add SMEM entry for MSMFALCON"
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmfalcon.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index 2b19c74bd3cb..d816237fdc5f 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -313,6 +313,23 @@ compatible = "qcom,dummycc"; #clock-cells = <1>; }; + + qcom,ipc-spinlock@1f40000 { + compatible = "qcom,ipc-spinlock-sfpb"; + reg = <0x1f40000 0x8000>; + qcom,num-locks = <8>; + }; + + qcom,smem@86000000 { + compatible = "qcom,smem"; + reg = <0x86000000 0x200000>, + <0x17911008 0x4>, + <0x778000 0x7000>, + <0x1fd4000 0x8>; + reg-names = "smem", "irq-reg-base", "aux-mem1", + "smem_targ_info_reg"; + qcom,mpu-enabled; + }; }; #include "msmfalcon-ion.dtsi" |