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authorSonic Zhang <sonic.zhang@analog.com>2012-05-17 17:35:24 +0800
committerBob Liu <lliubbo@gmail.com>2012-05-21 14:54:53 +0800
commit1d3dbda6ed0216971291a48531e7b2578ddf7642 (patch)
tree21447098a19095840b91e3d2db85329bc751f85b /arch/blackfin/kernel
parent72b099ed93989575b0c447023748968d30059e8f (diff)
blackfin: bf60x: cleanup get clock code
Remove redundance code for get clock. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r--arch/blackfin/kernel/setup.c64
1 files changed, 22 insertions, 42 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 55fb42b50463..d0246de347cf 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -888,6 +888,22 @@ void __init native_machine_early_platform_add_devices(void)
{
}
+#ifdef CONFIG_BF60x
+static inline u_long bfin_get_clk(char *name)
+{
+ struct clk *clk;
+ u_long clk_rate;
+
+ clk = clk_get(NULL, name);
+ if (IS_ERR(clk))
+ return 0;
+
+ clk_rate = clk_get_rate(clk);
+ clk_put(clk);
+ return clk_rate;
+}
+#endif
+
void __init setup_arch(char **cmdline_p)
{
u32 mmr;
@@ -1045,7 +1061,7 @@ void __init setup_arch(char **cmdline_p)
#ifdef CONFIG_BF60x
printk(KERN_INFO "Processor Speed: %lu MHz core clock, %lu MHz SCLk, %lu MHz SCLK0, %lu MHz SCLK1 and %lu MHz DCLK\n",
- cclk / 1000000, sclk / 1000000, get_sclk0() / 1000000, get_sclk1() / 1000000, get_dclk() / 1000000);
+ cclk / 1000000, bfin_get_clk("SYSCLK") / 1000000, get_sclk0() / 1000000, get_sclk1() / 1000000, get_dclk() / 1000000);
#else
printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
cclk / 1000000, sclk / 1000000);
@@ -1146,16 +1162,7 @@ static u_long get_vco(void)
u_long get_cclk(void)
{
#ifdef CONFIG_BF60x
- struct clk *cclk;
- u_long cclk_rate;
-
- cclk = clk_get(NULL, "CCLK");
- if (IS_ERR(cclk))
- return 0;
-
- cclk_rate = clk_get_rate(cclk);
- clk_put(cclk);
- return cclk_rate;
+ return bfin_get_clk("CCLK");
#else
static u_long cached_cclk_pll_div, cached_cclk;
u_long csel, ssel;
@@ -1184,53 +1191,26 @@ EXPORT_SYMBOL(get_cclk);
/* Get the bf60x clock of SCLK0 domain */
u_long get_sclk0(void)
{
- struct clk *sclk0;
- u_long sclk0_rate;
-
- sclk0 = clk_get(NULL, "SCLK0");
- if (IS_ERR(sclk0))
- return 0;
-
- sclk0_rate = clk_get_rate(sclk0);
- clk_put(sclk0);
- return sclk0_rate;
+ return bfin_get_clk("SCLK0");
}
EXPORT_SYMBOL(get_sclk0);
/* Get the bf60x clock of SCLK1 domain */
u_long get_sclk1(void)
{
- struct clk *sclk1;
- u_long sclk1_rate;
-
- sclk1 = clk_get(NULL, "SCLK1");
- if (IS_ERR(sclk1))
- return 0;
-
- sclk1_rate = clk_get_rate(sclk1);
- clk_put(sclk1);
- return sclk1_rate;
+ return bfin_get_clk("SCLK1");
}
EXPORT_SYMBOL(get_sclk1);
/* Get the bf60x DRAM clock */
u_long get_dclk(void)
{
- struct clk *dclk;
- u_long dclk_rate;
-
- dclk = clk_get(NULL, "DCLK");
- if (IS_ERR(dclk))
- return 0;
-
- dclk_rate = clk_get_rate(dclk);
- clk_put(dclk);
- return dclk_rate;
+ return bfin_get_clk("DCLK");
}
EXPORT_SYMBOL(get_dclk);
#endif
-/* Get the System clock */
+/* Get the default system clock */
u_long get_sclk(void)
{
#ifdef CONFIG_BF60x