diff options
author | Michael Bestas <mkbestas@lineageos.org> | 2020-12-09 21:13:42 +0200 |
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committer | Michael Bestas <mkbestas@lineageos.org> | 2020-12-09 21:13:42 +0200 |
commit | 8102b85e3faf04bca28962ad5e351a8f6e96e1d4 (patch) | |
tree | 769f7e955438f13ba98787fc9dcf4772e88816bc /arch/mips | |
parent | 7b1ec6c9c1ad407744d6480da1ef9d650679e831 (diff) | |
parent | 4cb652f2d058eacdfb720e53de0dceaf19ae4587 (diff) |
Merge branch 'android-4.4-p' of https://android.googlesource.com/kernel/common into lineage-17.1-caf-msm8998
This brings LA.UM.8.4.r1-06200-8x98.0 up to date with
https://android.googlesource.com/kernel/common/ android-4.4-p at commit:
4cb652f2d058e ANDROID: cuttlefish_defconfig: Disable CONFIG_KSM
Conflicts:
arch/arm64/include/asm/mmu_context.h
arch/powerpc/include/asm/uaccess.h
drivers/scsi/ufs/ufshcd.c
Change-Id: I25e090fc1a5a7d379aa8f681371e9918b3adeda6
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/alchemy/common/clock.c | 9 | ||||
-rw-r--r-- | arch/mips/kernel/genex.S | 3 |
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c index bd34f4093cd9..7b0dec333c96 100644 --- a/arch/mips/alchemy/common/clock.c +++ b/arch/mips/alchemy/common/clock.c @@ -151,6 +151,7 @@ static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name, { struct clk_init_data id; struct clk_hw *h; + struct clk *clk; h = kzalloc(sizeof(*h), GFP_KERNEL); if (!h) @@ -163,7 +164,13 @@ static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name, id.ops = &alchemy_clkops_cpu; h->init = &id; - return clk_register(NULL, h); + clk = clk_register(NULL, h); + if (IS_ERR(clk)) { + pr_err("failed to register clock\n"); + kfree(h); + } + + return clk; } /* AUXPLLs ************************************************************/ diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 7ffd158de76e..1b837d6f73de 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -142,9 +142,8 @@ LEAF(__r4k_wait) PTR_LA k1, __r4k_wait ori k0, 0x1f /* 32 byte rollback region */ xori k0, 0x1f - bne k0, k1, 9f + bne k0, k1, \handler MTC0 k0, CP0_EPC -9: .set pop .endm |