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authorChris Metcalf <cmetcalf@tilera.com>2012-04-07 17:10:17 -0400
committerChris Metcalf <cmetcalf@tilera.com>2012-07-18 16:39:11 -0400
commit129622672d70711c6c844fb529381ff0dad9085a (patch)
treeea05d97ec3a457814e282c5cf8423c9e30994cb9 /arch/tile/kernel/setup.c
parentbce5bbbb23f780a792be7e594af7cd4b4aae1cd4 (diff)
arch/tile: tilegx PCI root complex support
This change implements PCIe root complex support for tilegx using the kernel support layer for accessing the TRIO hardware shim. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/setup.c')
-rw-r--r--arch/tile/kernel/setup.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index dd87f3420390..6d179dfcc15e 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -1344,6 +1344,7 @@ void __init setup_arch(char **cmdline_p)
#ifdef CONFIG_PCI
+#if !defined (__tilegx__)
/*
* Initialize the PCI structures. This is done before memory
* setup so that we know whether or not a pci_reserve region
@@ -1351,6 +1352,7 @@ void __init setup_arch(char **cmdline_p)
*/
if (tile_pci_init() == 0)
pci_reserve_mb = 0;
+#endif
/* PCI systems reserve a region just below 4GB for mapping iomem. */
pci_reserve_end_pfn = (1 << (32 - PAGE_SHIFT));
@@ -1379,6 +1381,10 @@ void __init setup_arch(char **cmdline_p)
setup_cpu(1);
setup_clock();
load_hv_initrd();
+
+#if defined(CONFIG_PCI) && defined (__tilegx__)
+ tile_pci_init();
+#endif
}