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author | Chris Zankel <chris@zankel.net> | 2008-02-12 10:11:45 -0800 |
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committer | Chris Zankel <chris@zankel.net> | 2008-02-13 17:08:18 -0800 |
commit | 0b2c3afdaaaa3e577300b2235df43eb8af00020b (patch) | |
tree | a19e12791a9d109f61f1edce731f50589302d04d /arch/xtensa/kernel/process.c | |
parent | 70e137eb48f62e59dfa5e06d0d01f123e9464f9a (diff) |
[XTENSA] Fix icache flush for cache aliasing
Set the execution bit in the temporary TLB when we flush the
instruction cache.
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/kernel/process.c')
0 files changed, 0 insertions, 0 deletions