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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2013-06-19 15:52:12 -0400
committerTony Lindgren <tony@atomide.com>2013-07-04 05:10:51 -0700
commit62618c17e077b22bb12bdf754ca5bf89f2ae4dcd (patch)
tree7b8db8137aa048a5d73a1ebe23ef555ffcceabf5 /arch
parent2abc75a8c52af5e9cd32223554e6071e07b44559 (diff)
ARM: OMAP5: Enable Cortex A15 errata 798181
ARM errata 798181 is applicable for OMAP5 based devices. So enable the same in the build. Errata extract and workaround information is as below. On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not adequately shooting down all use of the old entries. The ARM_ERRATA_798181 option enables the Linux kernel workaround for this erratum which sends an IPI to the CPUs that are running the same ASID as the one being invalidated. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index c7b32a966f67..e658f7a272e4 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -114,6 +114,7 @@ config SOC_OMAP5
select HAVE_SMP
select COMMON_CLK
select HAVE_ARM_ARCH_TIMER
+ select ARM_ERRATA_798181
comment "OMAP Core Type"
depends on ARCH_OMAP2