diff options
| author | Hemant Kumar <hemantk@codeaurora.org> | 2016-05-12 18:34:37 -0700 |
|---|---|---|
| committer | Jeevan Shriram <jshriram@codeaurora.org> | 2016-05-19 16:07:45 -0700 |
| commit | 74c123fd3ff8882638bfb61761b7115ece9413ef (patch) | |
| tree | 1529e06a74674acaf6376e23df9d208dc437cc91 /arch | |
| parent | 3a0c8b9280414f7da4ce28751eb2b9cf423319a6 (diff) | |
ARM: dts: msm: Add TCSR_USB3_DP_PHYMODE register on msmcobalt
This register write allows to select the usb3 phy mode. It is
recommended to explicitly select the usb3 phy mode before
programming the phy init sequence.
Change-Id: I2cb648b976d72d2020357881768674241557c56b
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 93cafbac7f10..1ca911192eb7 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1610,9 +1610,11 @@ ssphy: ssphy@c010000 { compatible = "qcom,usb-ssphy-qmp-v2"; reg = <0x0c010000 0xe0c>, - <0x01fcb244 0x4>; + <0x01fcb244 0x4>, + <0x01fcb248 0x4>; reg-names = "qmp_phy_base", - "vls_clamp_reg"; + "vls_clamp_reg", + "tcsr_usb3_dp_phymode"; vdd-supply = <&pmcobalt_l1>; core-supply = <&pmcobalt_l2>; qcom,vdd-voltage-level = <0 880000 880000>; |