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authorRunmin Wang <runminw@codeaurora.org>2016-05-03 13:13:26 -0700
committerRunmin Wang <runminw@codeaurora.org>2016-10-13 13:04:11 -0700
commit90c2d5300ee2bc1dafae9be7225dd61540cffef7 (patch)
tree64b1384d51da3fe9b2c8570e0451f83546f5096b /arch
parent1fac7f53bdec193dfbaba8a9706075dc4d5ff756 (diff)
soc: qcom: core_hang: Separate sysfs entry for silver and gold cluster
Silver and gold cluster use different PMU_EVENT and may need to have different threshold values. This patch creates different sysfs entries for silver and gold cluster. CRs-Fixed: 1004392 Change-Id: I88cdf5110cadb44a81c0c700d5188bf639bb2129 Signed-off-by: Runmin Wang <runminw@codeaurora.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt.dtsi16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
index 96518dca0ec1..aaa0bec51a27 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
@@ -1135,13 +1135,21 @@
qcom,firmware-name = "ipa_fws";
};
- qcom,chd {
+ qcom,chd_silver {
compatible = "qcom,core-hang-detect";
+ label = "silver";
qcom,threshold-arr = <0x179880b0 0x179980b0
- 0x179a80b0 0x179b80b0 0x178880b0 0x178980b0
- 0x178a80b0 0x178b80b0>;
+ 0x179a80b0 0x179b80b0>;
qcom,config-arr = <0x179880b8 0x179980b8
- 0x179a80b8 0x179b80b8 0x178880b8 0x178980b8
+ 0x179a80b8 0x179b80b8>;
+ };
+
+ qcom,chd_gold {
+ compatible = "qcom,core-hang-detect";
+ label = "gold";
+ qcom,threshold-arr = <0x178880b0 0x178980b0
+ 0x178a80b0 0x178b80b0>;
+ qcom,config-arr = <0x178880b8 0x178980b8
0x178a80b8 0x178b80b8>;
};