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authorOdelu Kukatla <okukatla@codeaurora.org>2017-02-13 10:19:20 +0530
committerOdelu Kukatla <okukatla@codeaurora.org>2017-02-13 10:23:21 +0530
commit9ae1287659fa9e0527347d3d23a02e57ba0b1c0b (patch)
treeac6e327148626537a1e0a600e6528f52b84e3c67 /arch
parent88fee0f3817730e279872a381b760833a146aa5b (diff)
ARM: dts: msm: Enable OSM CPU clocks for SDM630
OSM cpu clocks require the supply rails on which power and perf clusters are connected, so add the same. And also enable the OSM cpu clocks. Change-Id: Ied5e360d3569fb5f75a08d8495ec783886b924fd Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/qcom/sdm630.dtsi4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom/sdm630.dtsi b/arch/arm/boot/dts/qcom/sdm630.dtsi
index 15b62afc0347..f7ba541ffb6b 100644
--- a/arch/arm/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm/boot/dts/qcom/sdm630.dtsi
@@ -1095,13 +1095,15 @@
clock_cpu: qcom,clk-cpu-630@179c0000 {
compatible = "qcom,clk-cpu-osm-sdm630";
- status = "disabled";
reg = <0x179c0000 0x4000>, <0x17916000 0x1000>,
<0x17816000 0x1000>, <0x179d1000 0x1000>,
<0x00784130 0x8>;
reg-names = "osm", "pwrcl_pll", "perfcl_pll",
"apcs_common", "perfcl_efuse";
+ vdd-pwrcl-supply = <&apc0_pwrcl_vreg>;
+ vdd-perfcl-supply = <&apc1_perfcl_vreg>;
+
interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "pwrcl-irq", "perfcl-irq";