diff options
| author | Mayank Rana <mrana@codeaurora.org> | 2016-04-08 10:08:48 -0700 |
|---|---|---|
| committer | Jeevan Shriram <jshriram@codeaurora.org> | 2016-04-13 11:05:13 -0700 |
| commit | 9c2a287cae68ab97f9236aa13b5546a963fe9e0f (patch) | |
| tree | 8912e6221032433caf7b72ffa4c1f16a0f64597e /arch | |
| parent | 37e734900a2a705af019f7017db34e6e27599e51 (diff) | |
ARM: dts: msm: Select CML clock with USB QMP PHY on msmcobalt
USB QMP PHY requires CML based refclock, otherwise USB QMP PHY
PLL may not lock. Hence select CML based refclock by programming
SYSCLK_EN_SEL register.
CRs-Fixed: 1001463
Change-Id: I4cc68a447d0cf3571a50b18d7eec5415430f9423
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index fda8d11e1c52..ba58d0639f1a 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1302,6 +1302,7 @@ /* <reg_offset, value, delay> */ <0x138 0x30 0x00 /* Common block */ 0x3c 0x06 0x00 + 0x80 0x14 0x00 /* SYSCLK_EN_SEL */ 0x8c 0x08 0x00 0x15c 0x06 0x00 0x164 0x01 0x00 |