diff options
| author | Taniya Das <tdas@codeaurora.org> | 2016-02-02 20:25:36 +0530 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 21:19:33 -0700 |
| commit | 71910a2a1337e13f42d1b4586c1f7246287a6221 (patch) | |
| tree | fa47a51f6a6e102256c9b75f7d9268f46c25c0bf /drivers/clk/msm | |
| parent | 938ef7a4ac19b24cc28379d3c33a5d9a39ef665e (diff) | |
clk: msm: clock-generic: Fix max_div calculation for 32 bit
The ULONG_MAX value on 32 bit compilers is +4,294,967,295 and when divided
with some high frequencies, it could lead to min_div > max_div. Thus
resulting in clk_set_rate failure for higher frequencies.
CRs-Fixed: 971371
Change-Id: Id982328aeadf24d29e295e042a57453ea4e35c1b
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Diffstat (limited to 'drivers/clk/msm')
| -rw-r--r-- | drivers/clk/msm/clock-generic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/msm/clock-generic.c b/drivers/clk/msm/clock-generic.c index 087beacd55a7..eeb940e434cf 100644 --- a/drivers/clk/msm/clock-generic.c +++ b/drivers/clk/msm/clock-generic.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -267,7 +267,7 @@ static long __div_round_rate(struct div_data *data, unsigned long rate, rate = max(rate, 1UL); min_div = max(data->min_div, 1U); - max_div = min(data->max_div, (unsigned int) (ULONG_MAX / rate)); + max_div = min(data->max_div, (unsigned int) (ULONG_MAX)); /* * div values are doubled for half dividers. |