diff options
| author | Taniya Das <tdas@codeaurora.org> | 2017-01-16 17:06:29 +0530 |
|---|---|---|
| committer | Taniya Das <tdas@codeaurora.org> | 2017-01-18 08:59:33 +0530 |
| commit | 60fd13b746c7299a19ff81b40472a6ecdc3edae9 (patch) | |
| tree | e8dec1ab2f30dc148e9c1f9308eabf801b7bf5ab /drivers/clk/qcom | |
| parent | a51b7f60003e6071703d5e4489dae0f3ab7ae264 (diff) | |
clk: qcom: Remove few graphics clock for sdm660
The gcc_gpu_bimc_gfx_src_clk and gcc_gpu_snoc_dvm_gfx_clk need
to left at their default state of ON. Remove controlling them
from the linux clock driver to avoid disabling them during
late_init.
Change-Id: Iefc033998bf87fcc98dfaa1b7321d9cc33dedd5e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom')
| -rw-r--r-- | drivers/clk/qcom/gcc-sdm660.c | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c index 5b118f297238..6737c42f0fde 100644 --- a/drivers/clk/qcom/gcc-sdm660.c +++ b/drivers/clk/qcom/gcc-sdm660.c @@ -1735,19 +1735,6 @@ static struct clk_branch gcc_gpu_bimc_gfx_clk = { }, }; -static struct clk_branch gcc_gpu_bimc_gfx_src_clk = { - .halt_reg = 0x7100c, - .halt_check = BRANCH_HALT, - .clkr = { - .enable_reg = 0x7100c, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "gcc_gpu_bimc_gfx_src_clk", - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_gpu_cfg_ahb_clk = { .halt_reg = 0x71004, .halt_check = BRANCH_VOTED, @@ -1807,19 +1794,6 @@ static struct clk_branch gcc_gpu_gpll0_div_clk = { }, }; -static struct clk_branch gcc_gpu_snoc_dvm_gfx_clk = { - .halt_reg = 0x71018, - .halt_check = BRANCH_HALT, - .clkr = { - .enable_reg = 0x71018, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "gcc_gpu_snoc_dvm_gfx_clk", - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_hmss_ahb_clk = { .halt_reg = 0x48000, .halt_check = BRANCH_HALT_VOTED, @@ -2647,11 +2621,9 @@ static struct clk_regmap *gcc_660_clocks[] = { [GCC_GP2_CLK] = &gcc_gp2_clk.clkr, [GCC_GP3_CLK] = &gcc_gp3_clk.clkr, [GCC_GPU_BIMC_GFX_CLK] = &gcc_gpu_bimc_gfx_clk.clkr, - [GCC_GPU_BIMC_GFX_SRC_CLK] = &gcc_gpu_bimc_gfx_src_clk.clkr, [GCC_GPU_CFG_AHB_CLK] = &gcc_gpu_cfg_ahb_clk.clkr, [GCC_GPU_GPLL0_CLK] = &gcc_gpu_gpll0_clk.clkr, [GCC_GPU_GPLL0_DIV_CLK] = &gcc_gpu_gpll0_div_clk.clkr, - [GCC_GPU_SNOC_DVM_GFX_CLK] = &gcc_gpu_snoc_dvm_gfx_clk.clkr, [GCC_HMSS_AHB_CLK] = &gcc_hmss_ahb_clk.clkr, [GCC_HMSS_DVM_BUS_CLK] = &gcc_hmss_dvm_bus_clk.clkr, [GCC_HMSS_RBCPR_CLK] = &gcc_hmss_rbcpr_clk.clkr, @@ -2890,9 +2862,7 @@ static const char *const debug_mux_parent_names[] = { "gcc_gp2_clk", "gcc_gp3_clk", "gcc_gpu_bimc_gfx_clk", - "gcc_gpu_bimc_gfx_src_clk", "gcc_gpu_cfg_ahb_clk", - "gcc_gpu_snoc_dvm_gfx_clk", "gcc_hmss_ahb_clk", "gcc_hmss_dvm_bus_clk", "gcc_hmss_rbcpr_clk", @@ -3071,9 +3041,7 @@ static struct clk_debug_mux gcc_debug_mux = { { "gcc_gp2_clk", 0x0E0 }, { "gcc_gp3_clk", 0x0E1 }, { "gcc_gpu_bimc_gfx_clk", 0x13F }, - { "gcc_gpu_bimc_gfx_src_clk", 0x13E }, { "gcc_gpu_cfg_ahb_clk", 0x13B }, - { "gcc_gpu_snoc_dvm_gfx_clk", 0x141 }, { "gcc_hmss_ahb_clk", 0x0BA }, { "gcc_hmss_dvm_bus_clk", 0x0BF }, { "gcc_hmss_rbcpr_clk", 0x0BC }, |