diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-02-08 12:10:36 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 21:20:01 -0700 |
| commit | 18e5e80ee99d4e2ef2786620a927c589f6492133 (patch) | |
| tree | ae512bee983405b0c9dd8280faa80074eea5c20d /drivers/clk | |
| parent | dc29065dc2ed55594b85755268ec34215e813341 (diff) | |
clk: msm: clock: Gate the limits clock during certain sleep states
Program the DROOP_CODE register for both clusters so that
the limits management clock is gated off during certain
sleep states.
CRs-Fixed: 973567
Change-Id: If4860d329393ece54a4d0f017c2700d4bde9d2b6
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/msm/clock-cpu-8996.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/clk/msm/clock-cpu-8996.c b/drivers/clk/msm/clock-cpu-8996.c index 603c2b38602c..8038fed7bcbe 100644 --- a/drivers/clk/msm/clock-cpu-8996.c +++ b/drivers/clk/msm/clock-cpu-8996.c @@ -1760,11 +1760,12 @@ int __init cpu_clock_8996_early_init(void) if (cpu_clocks_pro) { /* * Configure ACS logic to switch to always-on clock - * source during D2-D5 entry + * source during D2-D5 entry. In addition, gate the + * limits management clock during certain sleep states. */ - writel_relaxed(0x1, vbases[APC0_BASE] + + writel_relaxed(0x3, vbases[APC0_BASE] + MDD_DROOP_CODE); - writel_relaxed(0x1, vbases[APC1_BASE] + + writel_relaxed(0x3, vbases[APC1_BASE] + MDD_DROOP_CODE); /* * Ensure that the writes go through before enabling |