diff options
author | Mitchel Humpherys <mitchelh@codeaurora.org> | 2015-01-13 12:14:26 -0800 |
---|---|---|
committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:41:35 -0700 |
commit | 31a3efe49a5baf6ccdeff216eea8e9b7db4e930f (patch) | |
tree | add72219abd98dd06b2bf0b76ae8811b6d945ed0 /drivers/clk | |
parent | 3eb792112975f7a5a4714f2b9592c93a60dfa357 (diff) |
iopoll: unify atomic and non-atomic interfaces
readl_poll_timeout and readl_poll_timeout_atomic really accomplish the
same thing, just in different contexts. Unify their interfaces to
reduce cognitive load on developers and code reviewers.
Change-Id: I319db7cb3894c66447b3337c6802b723a38b3544
[veeras@codeaurora.org: As part of 3.18 upgrade,
remove all non-display-related code from this commit
arch/arm/mach-msm/clock-mdss-8974.c
drivers/iommu/arm-smmu.c
include/linux/iopoll.h]
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/msm/mdss/mdss-dsi-20nm-pll-util.c | 10 | ||||
-rw-r--r-- | drivers/clk/msm/mdss/mdss-dsi-pll-util.c | 8 | ||||
-rw-r--r-- | drivers/clk/msm/mdss/mdss-edp-pll-28hpm.c | 8 | ||||
-rw-r--r-- | drivers/clk/msm/mdss/mdss-hdmi-pll-20nm.c | 10 | ||||
-rw-r--r-- | drivers/clk/msm/mdss/mdss-hdmi-pll-28hpm.c | 22 |
5 files changed, 29 insertions, 29 deletions
diff --git a/drivers/clk/msm/mdss/mdss-dsi-20nm-pll-util.c b/drivers/clk/msm/mdss/mdss-dsi-20nm-pll-util.c index cccd70983b20..b7cf01b28003 100644 --- a/drivers/clk/msm/mdss/mdss-dsi-20nm-pll-util.c +++ b/drivers/clk/msm/mdss/mdss-dsi-20nm-pll-util.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -124,8 +124,8 @@ #define MMSS_DSI_DYNAMIC_REFRESH_PLL_CTRL16 0x054 #define MMSS_DSI_DYNAMIC_REFRESH_PLL_CTRL17 0x058 -#define DSI_PLL_POLL_MAX_READS 15 -#define DSI_PLL_POLL_TIMEOUT_US 1000 +#define DSI_PLL_POLL_DELAY_US 1000 +#define DSI_PLL_POLL_TIMEOUT_US 15000 int set_mdss_byte_mux_sel(struct mux_clk *clk, int sel) { @@ -465,7 +465,7 @@ static bool pll_20nm_is_pll_locked(struct mdss_pll_resources *dsi_pll_res) MMSS_DSI_PHY_PLL_RESET_SM), status, ((status & BIT(5)) > 0), - DSI_PLL_POLL_MAX_READS, + DSI_PLL_POLL_DELAY_US, DSI_PLL_POLL_TIMEOUT_US)) { pr_debug("DSI PLL status=%x failed to Lock\n", status); pll_locked = false; @@ -473,7 +473,7 @@ static bool pll_20nm_is_pll_locked(struct mdss_pll_resources *dsi_pll_res) MMSS_DSI_PHY_PLL_RESET_SM), status, ((status & BIT(6)) > 0), - DSI_PLL_POLL_MAX_READS, + DSI_PLL_POLL_DELAY_US, DSI_PLL_POLL_TIMEOUT_US)) { pr_debug("DSI PLL status=%x PLl not ready\n", status); pll_locked = false; diff --git a/drivers/clk/msm/mdss/mdss-dsi-pll-util.c b/drivers/clk/msm/mdss/mdss-dsi-pll-util.c index 943b052d3d2f..6a26fcd3411a 100644 --- a/drivers/clk/msm/mdss/mdss-dsi-pll-util.c +++ b/drivers/clk/msm/mdss/mdss-dsi-pll-util.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -51,8 +51,8 @@ #define DSI_PHY_PLL_UNIPHY_PLL_EFUSE_CFG (0x009C) #define DSI_PHY_PLL_UNIPHY_PLL_STATUS (0x00C0) -#define DSI_PLL_POLL_MAX_READS 10 -#define DSI_PLL_POLL_TIMEOUT_US 50 +#define DSI_PLL_POLL_DELAY_US 50 +#define DSI_PLL_POLL_TIMEOUT_US 500 int set_byte_mux_sel(struct mux_clk *clk, int sel) { @@ -255,7 +255,7 @@ int dsi_pll_lock_status(struct mdss_pll_resources *dsi_pll_res) DSI_PHY_PLL_UNIPHY_PLL_STATUS), status, ((status & BIT(0)) == 1), - DSI_PLL_POLL_MAX_READS, + DSI_PLL_POLL_DELAY_US, DSI_PLL_POLL_TIMEOUT_US)) { pr_debug("DSI PLL status=%x failed to Lock\n", status); pll_locked = 0; diff --git a/drivers/clk/msm/mdss/mdss-edp-pll-28hpm.c b/drivers/clk/msm/mdss/mdss-edp-pll-28hpm.c index ead3fbd75395..48a38bc38b42 100644 --- a/drivers/clk/msm/mdss/mdss-edp-pll-28hpm.c +++ b/drivers/clk/msm/mdss/mdss-edp-pll-28hpm.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -54,8 +54,8 @@ #define EDP_PHY_PLL_UNIPHY_PLL_LKDET_CFG0 (0x005C) #define EDP_PHY_PLL_UNIPHY_PLL_LKDET_CFG1 (0x0060) -#define EDP_PLL_POLL_MAX_READS 10 -#define EDP_PLL_POLL_TIMEOUT_US 50 +#define EDP_PLL_POLL_DELAY_US 50 +#define EDP_PLL_POLL_TIMEOUT_US 500 static struct clk_ops edp_mainlink_clk_src_ops; static struct clk_div_ops fixed_5div_ops; /* null ops */ @@ -385,7 +385,7 @@ static int edp_pll_lock_status(struct mdss_pll_resources *edp_pll_res) /* poll for PLL ready status */ if (readl_poll_timeout_atomic((edp_pll_res->pll_base + 0xc0), status, ((status & BIT(0)) == 1), - EDP_PLL_POLL_MAX_READS, + EDP_PLL_POLL_DELAY_US, EDP_PLL_POLL_TIMEOUT_US)) { pr_debug("EDP PLL status=%x failed to Lock\n", status); pll_locked = 0; diff --git a/drivers/clk/msm/mdss/mdss-hdmi-pll-20nm.c b/drivers/clk/msm/mdss/mdss-hdmi-pll-20nm.c index f7c46ec84059..443c7f1ac3ae 100644 --- a/drivers/clk/msm/mdss/mdss-hdmi-pll-20nm.c +++ b/drivers/clk/msm/mdss/mdss-hdmi-pll-20nm.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -385,8 +385,8 @@ #define HDMI_PHY_REVISION_ID2 (0xC4) #define HDMI_PHY_REVISION_ID3 (0xC8) -#define HDMI_PLL_POLL_MAX_READS 2500 -#define HDMI_PLL_POLL_TIMEOUT_US 50 +#define HDMI_PLL_POLL_DELAY_US 50 +#define HDMI_PLL_POLL_TIMEOUT_US 125000 #define HDMI_PLL_REF_CLK_RATE 192ULL #define HDMI_PLL_DIVISOR 10000000000ULL #define HDMI_PLL_DIVISOR_32 100000U @@ -414,7 +414,7 @@ static int hdmi_20nm_pll_lock_status(struct mdss_pll_resources *io) if (!readl_poll_timeout_atomic( (io->pll_base + QSERDES_COM_RESET_SM), status, ((status & BIT(6)) == 1), - HDMI_PLL_POLL_MAX_READS, + HDMI_PLL_POLL_DELAY_US, HDMI_PLL_POLL_TIMEOUT_US)) { pr_debug("%s: C READY\n", __func__); pll_locked = 1; @@ -427,7 +427,7 @@ static int hdmi_20nm_pll_lock_status(struct mdss_pll_resources *io) if (pll_locked && !readl_poll_timeout_atomic( (io->phy_base + HDMI_PHY_STATUS), status, ((status & BIT(0)) == 1), - HDMI_PLL_POLL_MAX_READS, + HDMI_PLL_POLL_DELAY_US, HDMI_PLL_POLL_TIMEOUT_US)) { pr_debug("%s: PHY READY\n", __func__); phy_ready = 1; diff --git a/drivers/clk/msm/mdss/mdss-hdmi-pll-28hpm.c b/drivers/clk/msm/mdss/mdss-hdmi-pll-28hpm.c index dbc469b3f71c..30f447cbeab1 100644 --- a/drivers/clk/msm/mdss/mdss-hdmi-pll-28hpm.c +++ b/drivers/clk/msm/mdss/mdss-hdmi-pll-28hpm.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -85,8 +85,8 @@ #define HDMI_UNI_PLL_CAL_CFG11 (0x0098) #define HDMI_UNI_PLL_STATUS (0x00C0) -#define HDMI_PLL_POLL_MAX_READS 10 -#define HDMI_PLL_POLL_TIMEOUT_US 50 +#define HDMI_PLL_POLL_DELAY_US 50 +#define HDMI_PLL_POLL_TIMEOUT_US 500 static inline struct hdmi_pll_vco_clk *to_hdmi_vco_clk(struct clk *clk) { @@ -121,7 +121,7 @@ static void hdmi_vco_disable(struct clk *c) static int hdmi_vco_enable(struct clk *c) { u32 status; - u32 max_reads, timeout_us; + u32 delay_us, timeout_us; int rc; struct hdmi_pll_vco_clk *vco = to_hdmi_vco_clk(c); struct mdss_pll_resources *hdmi_pll_res = vco->priv; @@ -150,11 +150,11 @@ static int hdmi_vco_enable(struct clk *c) udelay(350); /* poll for PLL ready status */ - max_reads = 20; - timeout_us = 100; + delay_us = 100; + timeout_us = 2000; if (readl_poll_timeout_atomic( (hdmi_pll_res->pll_base + HDMI_UNI_PLL_STATUS), - status, ((status & BIT(0)) == 1), max_reads, timeout_us)) { + status, ((status & BIT(0)) == 1), delay_us, timeout_us)) { pr_err("hdmi phy pll status=%x failed to Lock\n", status); hdmi_vco_disable(c); mdss_pll_resource_enable(hdmi_pll_res, false); @@ -164,11 +164,11 @@ static int hdmi_vco_enable(struct clk *c) udelay(350); /* poll for PHY ready status */ - max_reads = 20; - timeout_us = 100; + delay_us = 100; + timeout_us = 2000; if (readl_poll_timeout_atomic( (hdmi_pll_res->phy_base + HDMI_PHY_STATUS), - status, ((status & BIT(0)) == 1), max_reads, timeout_us)) { + status, ((status & BIT(0)) == 1), delay_us, timeout_us)) { pr_err("hdmi phy status=%x failed to Lock\n", status); hdmi_vco_disable(c); mdss_pll_resource_enable(hdmi_pll_res, false); @@ -853,7 +853,7 @@ static int hdmi_pll_lock_status(struct mdss_pll_resources *hdmi_pll_res) if (readl_poll_timeout_atomic( (hdmi_pll_res->phy_base + HDMI_PHY_STATUS), status, ((status & BIT(0)) == 1), - HDMI_PLL_POLL_MAX_READS, + HDMI_PLL_POLL_DELAY_US, HDMI_PLL_POLL_TIMEOUT_US)) { pr_debug("HDMI PLL status=%x failed to Lock\n", status); pll_locked = 0; |