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authorKeith Packard <keithp@keithp.com>2009-06-11 22:30:32 -0700
committerKeith Packard <keithp@keithp.com>2009-06-18 15:54:12 -0700
commita5b3da543d4882d57a2f3e05d37ad8e1e1453489 (patch)
treed2e5be7d8209fdf033338de6d4837442250c161d /drivers/gpu/drm
parentb11248df4c0decb1e473d5025f237be32c0f67bb (diff)
drm/i915: Clarify error returns from display port aux channel I/O
Use distinct error return values for each kind of aux channel I/O failure. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3f8d7b449e70..818fe34f2b5c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -209,15 +209,19 @@ intel_dp_aux_ch(struct intel_output *intel_output,
if ((status & DP_AUX_CH_CTL_DONE) == 0) {
printk(KERN_ERR "dp_aux_ch not done status 0x%08x\n", status);
- return -1;
+ return -EBUSY;
}
/* Check for timeout or receive error.
* Timeouts occur when the sink is not connected
*/
- if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR | DP_AUX_CH_CTL_RECEIVE_ERROR)) {
- printk(KERN_ERR "dp_aux_ch error status 0x%08x\n", status);
- return -1;
+ if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
+ printk(KERN_ERR "dp_aux_ch receive error status 0x%08x\n", status);
+ return -EIO;
+ }
+ if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) {
+ printk(KERN_ERR "dp_aux_ch timeout status 0x%08x\n", status);
+ return -ETIMEDOUT;
}
/* Unload any bytes sent back from the other side */
@@ -263,7 +267,7 @@ intel_dp_aux_native_write(struct intel_output *intel_output,
else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
udelay(100);
else
- return -1;
+ return -EIO;
}
return send_bytes;
}
@@ -299,7 +303,9 @@ intel_dp_aux_native_read(struct intel_output *intel_output,
for (;;) {
ret = intel_dp_aux_ch(intel_output, msg, msg_bytes,
reply, reply_bytes);
- if (ret <= 0)
+ if (ret == 0)
+ return -EPROTO;
+ if (ret < 0)
return ret;
ack = reply[0];
if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) {
@@ -309,7 +315,7 @@ intel_dp_aux_native_read(struct intel_output *intel_output,
else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
udelay(100);
else
- return -1;
+ return -EIO;
}
}